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Document ID: PMC-2010146, Issue 4
97
PM2329 ClassiPI Network Classification Processor Datasheet
4.2.2.9 E-RAM Configuration Register (ECR; 8230h)
Access Mode: Read/Write, Global
The bits in this register are used to configure the logical E-Word. This register must be programmed before
any E-RAM accesses are performed. This register should not be updated when E-RAM operations are in
progress, normally this register will be written during initialization only. In cascade mode, global write will
configure all the devices together.
E-RAM Enable
When this bit is reset to 0, all E-RAM operations are disabled. No C-Word will be supported in this
case.
When this bit is set to 1, E-RAM operations are enabled. C-Word is always assumed to be present in this
case. D-Words are defined using the D-Word Definition fields as explained below.
D-Word Definition
If E-RAM is present, up to 7 D-Words (depending on the physical width of the E-RAM) can be
configured. These 21 bits define the D-Word type for these 7 D-Words. the PM2329 also interprets this
register to obtain the logical E-Word Width. Three bits define each of the D-Words as follows:
000
D-Word Absent
001
Packet Count
010
Byte Count
011
Timestamp/State
100
User Defined
101
(Reserved)
110
(Reserved)
111
(Reserved)
The user can force gaps in the D-Words by programming them to be user defined.
Bit
Range
63:32
31
30:28
27:25
24:22
21:19
18:16
15:13
12:10
9:3
2:0
Size
32
1
3
3
3
3
3
3
3
7
3
Name
Value after
Reset
Undefined
0
000
000
000
000
000
000
000
Undefined
00h
(Reserved)
E-RAM Enable
D-Word #0 Definition
D-Word #1 Definition
D-Word #2 Definition
D-Word #3 Definition
D-Word #4 Definition
D-Word #5 Definition
D-Word #6 Definition
(Reserved)
E-RAM Width