參數(shù)資料
型號(hào)： PM2329
英文描述： Telecommunication IC
中文描述： 通信集成電路
文件頁數(shù)： 11/162頁
文件大小： 1581K
代理商： PM2329
Proprietary and Confidential to PMC-Sierra, Inc and for its Customers
’
Internal Use
Document ID: PMC-2010146, Issue 4
14
PM2329 ClassiPI Network Classification Processor Datasheet
1 PM2329 Overview
1.1 Introduction
The PM2329 is a member of the ClassiPI family of sophisticated Network Classification Processors
capable of supporting Gigabit/OC-48 interfaces. It is optimized for network environments--network
equipment can use the PM2329
’
s classification and analysis capability to implement wire-speed routing,
QoS, firewall and other functionality such as NAT and network monitoring that requires packet inspection
and classification. The PM2329 can be used to implement a mixed L2, L3, L4 and payload data (L5 to L7)
based search. With a peak throughput of up to OC-48 IPv4 packets per second, the PM2329 is an ideal
choice for all classification requirements.
The PM2329
’
s patented architecture has been designed to work efficiently in a wide range of system
configurations such as per-port, customized hardware, gigabit environment, or a centralized search engine
shared by a number of ports. The PM2329 architecture minimizes the bandwidth and latency incurred due
to multiple packet data transfers within the equipment. It can be programmed to perform multiple pattern
searches sequentially, and/or conditionally without host processor intervention, providing the high
throughput required for complex classification applications.
1.2 Features
Packet Header, Packet Data based or user-defined data based classification at Gigabit wire-speed.
Single PM2329 can store up to 16K policy rules.
Up to eight PM2329 devices can be cascaded to appear as a large PM2329 with support for up to
128K rules.
Supports external Synchronous RAM to extend capabilities such as programmed operation cycle
sequencing, per rule statistical information, and aging.
On-chip Policy Database or Rule Memory that can be partitioned to implement multiple
classification partitions.
Mechanism to allow support for up to 32 independent tasks running on the external processor.
Supports multiple classification lookups per input request. Each lookup extracts its unique key from
input data stream and applies its dedicated classification rule table to produce match results.
Classification lookups can be invoked sequentially and/or conditionally using sophisticated
sequencing mechanisms.
Register, External RAM, or Processor controlled lookup sequencing mechanism
Powerful assist for Routing, QoS, NAT, Firewall and Load Balancing applications.
High-speed synchronous packet data input and result output interface.
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