Proprietary and Confidential to PMC-Sierra, Inc and for its Customers
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Internal Use
Document ID: PMC-2010146, Issue 4
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PM2329 ClassiPI Network Classification Processor Datasheet
For Global access, the following conditions must be met:
SA[15] should be driven to 1,
SA[14:12] are ignored by the device, and
The lower SA signals must specify the address of the desired register.
Writes to registers accessible via Global access mode occur in the specified registers of all devices in the
cascade simultaneously. Reads from registers accessible via Global access mode are either from the
primary device (CID 0) or arbitrated via the cascade bus. Note that the non-cascaded configuration is a
simpified case of the cascade configuration.
Further details of Local and Global register access mechanism are provided in Chapter 4, Registers and
Programming.
2.4.1.9 Multiple Context Support
When the PM2329 is operating in multi-channel mode, it can can support multiple contexts running on the
external packet processor (see Operation Control Register, Chapter 4). In this mode, the PM2329 supports
up to 32 internal channels for processing packets from up to 32 different contexts. Each context of the
packet processor can access the assigned PM2329 channel, sending packets to it and obtaining the
associated results, without conflict with other contexts. Channels are numbered 0 to 31.
The SCHNUM[4:0] and SCHSTB signals are provided on the PM2329 System Interface. Whenever a
particular PM2329 channel has a result available, the channel number is output on the SCHNUM[4:0] pins,
and SCHSTB is driven active for one SCLK cycle. This provides a direct hardware mechanism to signal
the particular context of the packet processor to access the PM2329 Result FIFO for its results.
In cascade mode, the SCHNUM[4:0] and SCHSTB signals of the primary device are used. SCHNUM[4:0]
and SCHSTB signals from secondary devices in the cascade should be left unconnected and ignored.
For Packet processors that do not support this type of interface, the PM2329 channels can be polled by
individual contexts, or the PM2329 SINT* pin can be set up to provide a common interrupt whenever a
packet
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s processing is complete.
In single-channel mode, SCHNUM[4:0] signals may be left unconnected. SCHSTB is asserted whenever
the packet processing is complete.
2.4.1.10 Reset and Interrupts
RESET* is the asynchronous reset input to the PM2329. RESET* must be asserted for a minimum of 100
SCLK cycles after SCLK has become active. When asserted, it forces the device into the power-on/reset
state. The device enters the normal operating mode after this signal is deasserted.
SINT* is the interrupt from the PM2329 to the rest of the system. Masking, and programming the
conditions for assertion, are accomplished via the Interrupt Enable Register.