參數(shù)資料
型號: P8XC591
廠商: NXP Semiconductors N.V.
英文描述: HiRel FPGA, Low-Power 1.0?? CMOS Technology
中文描述: 單芯片8 - CAN控制器位微控制器
文件頁數(shù): 31/160頁
文件大小: 601K
代理商: P8XC591
2000 Jul 26
31
Philips Semiconductors
Preliminary Specification
Single-chip 8-bit microcontroller with CAN controller
P8xC591
Notes
1.
These address locations reflect the FIFO RAM space behind the current message. The contents are randomly after
power-up and contain the beginning of the next message that is received after the current one. If no further message
is received, parts of old messages may occur here.
Register at address 8 performs NO system function; reserved for future use.
2.
115
Tx Data 1
Tx Identifier 3
Tx Data 1
Tx Identifier 3
Tx Data 1
Tx Identifier 3
Tx Data 1
Tx Identifier 3
116
Tx Data 2
Tx Identifier 4
Tx Data 2
Tx Identifier 4
Tx Data 2
Tx Identifier 4
Tx Data 2
Tx Identifier 4
117
Tx Data 3
Tx Data 1
Tx Data 3
Tx Data 1
Tx Data 3
Tx Data 1
Tx Data 3
Tx Data 1
118
Tx Data 4
Tx Data 2
Tx Data 4
Tx Data 2
Tx Data 4
Tx Data 2
Tx Data 4
Tx Data 2
119
Tx Data 5
Tx Data 3
Tx Data 5
Tx Data 3
Tx Data 5
Tx Data 3
Tx Data 5
Tx Data 3
120
Tx Data 6
Tx Data 4
Tx Data 6
Tx Data 4
Tx Data 6
Tx Data 4
Tx Data 6
Tx Data 4
121
Tx Data 7
Tx Data 5
Tx Data 7
Tx Data 5
Tx Data 7
Tx Data 5
Tx Data 7
Tx Data 5
122
Tx Data 8
Tx Data 6
Tx Data 8
Tx Data 6
Tx Data 8
Tx Data 6
Tx Data 8
Tx Data 6
123
(TXB Memory)
Tx Data 7
(TXB Memory)
Tx Data 7
(TXB Memory)
Tx Data 7
(TXB Memory)
Tx Data 7
124
(TXB Memory)
Tx Data 8
(TXB Memory)
Tx Data 8
(TXB Memory)
Tx Data 8
(TXB Memory)
Tx Data 8
125 to 127
General purpose RAM
General purpose RAM
General purpose RAM
General purpose RAM
128
...
191
Internal RAM Address 0 (FIFO)
Internal RAM Address 63 (FIFO)
-
-
-
Internal RAM Address 0 (FIFO)
Internal RAM Address 63 (FIFO)
Internal RAM Address 0 (FIFO)
Internal RAM Address 63 (FIFO)
CAN
ADDR.
OPERATING MODE
RESET MODE
READ
WRITE
READ
WRITE
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