參數(shù)資料
型號: P8XC591
廠商: NXP Semiconductors N.V.
英文描述: HiRel FPGA, Low-Power 1.0?? CMOS Technology
中文描述: 單芯片8 - CAN控制器位微控制器
文件頁數(shù): 14/160頁
文件大?。?/td> 601K
代理商: P8XC591
2000 Jul 26
14
Philips Semiconductors
Preliminary Specification
Single-chip 8-bit microcontroller with CAN controller
P8xC591
Table 2
AUX-RAM Page Register (address 8EH)
Table 3
Description of AUX-RAM bits
Notes
1.
User software should not write ‘1’s to reserved bits. These bits may be used in future 80C51 family products to invoke
new features. In that case, the reset or inactive of the new bit will be 0, and its active value will be ‘1’. The value read
from a reserved bit is indeterminate.
Reset value is ‘xxxxxx10B’.
2.
7
6
5
4
3
2
1
0
-
-
-
-
-
LVADC
EXTRAM
AO
BIT
SYMBOL
LVADC
FUNCTION
7 to 3
2
Reserved for future use; see Note 1.
Enable A/D low voltage operation.
LVADC
0
1
Turns on A/D charge pump. Required for operation below 4 V.
Internal/External RAM (00H - FFH) access using MOVX @ RI / @ DPTR
EXTRAM
0
1
External data memory access.
Disable/Enable ALE.
AO
0
1
ALE is active only during a MOVX or MOVC instruction.
Operating Mode
Turns off A/D charge pump.
1
EXTRAM
Operating Mode
Internal AUX-RAM (00H - FH) access using MOVX @ RI / @ DPTR.
0
AO
Operating Mode
ALE is permitted at a constant rate of 1/6 the oscillator frequency.
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