參數資料
型號: P8XC591
廠商: NXP Semiconductors N.V.
英文描述: HiRel FPGA, Low-Power 1.0?? CMOS Technology
中文描述: 單芯片8 - CAN控制器位微控制器
文件頁數: 128/160頁
文件大小: 601K
代理商: P8XC591
2000 Jul 26
128
Philips Semiconductors
Preliminary Specification
Single-chip 8-bit microcontroller with CAN controller
P8xC591
20.3.1
ADC C
ONTROL
R
EGISTER
(ADCON)
Table 88
ADC Control Register (address C5H); Reset value = xx00 0000B
Table 89
Description of ADCON bits
Table 90
ADC status
Table 91
Selected analog channel
7
6
5
4
3
2
1
0
ADC.1
ADC.0
ADEX
ADCI
ADCS
AADR2
AADR1
AADR0
BIT
SYMBOL
DESCRIPTION
7
6
5
4
ADC.1
ADC.0
ADCI
Bit 1 of ADC result.
Bit 0 of ADC result.
Reserved for future use.
ADC interrupt flag.
This flag is set when an A/D conversion result is ready to be read.
An interrupt is invoked if its is enabled. The flag may be cleared by the interrupt service
routine. While this flag is set, the ADC cannot start a new conversion. ADCI cannot be
set by software.
ADC start and status.
Setting this bit starts an A/D conversion. It is set by software.
The ADC logic ensures that this signal is HIGH while the ADC is busy. On completion of
the conversion. ADCS is reset immediately after the interrupt flag has been set. ADCS
cannot be reset by software. A new conversion may not be started while either ADCS or
ADCI is high (see Table 90).
3
ADCS
If ADDCI is cleared by software while ADCS is set at the same time, a new A/D
conversion with the same channel number may be started.
But it is recommended to reset ADCI
before
ADCS is set.
Analogue input select:
This binary coded address selects one of the six analogue port
bits of P1 to be input to the converter. It can only be changed when ADCI and ADCS are
both LOW.
2 to 0
AADR2 to
AADR0
ADCI
ADCS
ADC STATUS
0
0
1
1
0
1
0
1
ADC not busy; a conversion can be started
ADC busy; start of a new conversion is blocked
Conversion completed; start of a new conversion requires ADCI=0
Conversion completed; start of a new conversion requires ADCI=0
AADR2
AADR1
AADR0
SELECTED ANALOG CHANNEL
0
0
0
0
1
1
0
0
1
1
0
0
0
1
0
1
0
1
ADC0 (P1.2)
ADC1 (P1.3)
ADC2 (P1.4)
ADC3 (P1.5)
ADC4 (P1.6)
ADC5 (P1.7)
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