參數(shù)資料
型號(hào)： IBM21P100BGB
元件分類： 總線控制器
英文描述： PCI BUS CONTROLLER, PBGA304
封裝： 31 X 31 MM, HEAT SINK, PLASTIC, BGA-304
文件頁數(shù)： 65/140頁
文件大?。?/td> 2032K
代理商： IBM21P100BGB
IBM21P100BGB
IBM 133 PCI-X Bridge R1.1
Bus Operation
Page 22 of 131
ppb11_operations.fm.03
July 9, 2001
The function number is not decoded since the bridge is a single-function device.
All configuration transactions to the bridge are handled as DWord (single data phase) operations.
All Type 0 configuration transactions to the bridge return or accept data immediately.
All Type 0 configuration transactions initiated on the secondary interface are ignored by the bridge.
3.4.2 Type 1 to Type 0 Translation by Bridge
Type 1 configuration transactions are used to configure devices in a hierarchical bus structure, which by defi-
nition has one or more bridges. A bridge is the only type of device that should respond to a Type 1 configura-
tion transaction. Type 1configuration commands are used to access PCI/PCI-X devices that are located on
bus segment other than the one where the Type 1 transaction is initiated.
The bridge performs a Type 1 to a Type 0 translation when a Type 1 transaction is presented on the primary
interface that is destined for a device attached directly to the secondary interface. In this case, the bridge
must convert the configuration transaction to a Type 0 format so that the secondary bus device can accept it.
Type 1 to Type 0 translations are never performed in the upstream direction.
The bridge claims a Type 1 configuration transaction on its primary bus and translates it into a Type 0 trans-
action on the secondary bus when the following conditions are met during the address phase:
The command on P_C/BE(3:0)# indicates a configuration read or configuration write transaction;
P_AD(1:0) are b‘01’;and
The bus number on P_AD(23:16) is the same as the value in the secondary bus number register in the
bridge’s configuration space.
When the bridge translates the Type 1 transaction to a Type 0 transaction on the secondary interface, it
performs the following translations to the address:
Sets S_AD(1:0) to b‘00’;
Decodes the device number specified and drives the bit pattern specified in
Table 5 on S_AD(31:16) for
useinthe assertionofthe device’s IDSEL signal;
Sets S_AD(15:11) to b‘00000’ if the secondary bus is operating in conventional PCI mode (if it is in PCI-X
mode, the device number is passed through unchanged); and
Leaves the function number and register number fields unchanged.
The bridge asserts a unique address signal based on the device number. These address signals may be
used as secondary bus IDSEL signals. Mapping of the address signals depends on the device number on
P_AD(15:11) of the Type1 configuration transaction.
Table 5 indicates how the bridge decodes the device number field.
相關(guān)PDF資料
PDF描述
IBM21P100BGC PCI BUS CONTROLLER, PBGA304
IBM25403GCX-3JC76C2 RISC PROCESSOR, PQFP16
IBM25405GP-3BA200C2 RISC PROCESSOR, PBGA456
IBM25EMPPC603EFG-100 32-BIT, 100 MHz, RISC PROCESSOR, PQFP240
IBM25EMPPC603EBG-100 32-BIT, 100 MHz, RISC PROCESSOR, CBGA255
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
IBM24L5086 制造商:AVED MEMORY PRODUCTS 功能描述: 制造商:AVED Memory Products 功能描述:
IBM25403GCX-3BC80C2 制造商:IBM 功能描述:RISC PROCESSOR, 160 Pin Plastic BGA
IBM25403GCX-3JC50C2 制造商:IBM 功能描述:403GCX-3JC50C2
IBM25403GCX-3JC66C2 制造商:IBM 功能描述:
IBM25403GCX3JC76C2 制造商:IBM 功能描述:
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購

我的聯(lián)系方式

*
*
*