參數資料
型號： IBM21P100BGB
元件分類： 總線控制器
英文描述： PCI BUS CONTROLLER, PBGA304
封裝： 31 X 31 MM, HEAT SINK, PLASTIC, BGA-304
文件頁數： 100/140頁
文件大?。?/td> 2032K
代理商： IBM21P100BGB
IBM21P100BGB
IBM 133 PCI-X Bridge R1.1
Configuration Registers
Page 54 of 131
ppb11_pcix_regs.fm.03
July 9, 2001
5.2.4.31 Bridge Control Register
The Bridge Control register provides extensions to the Command register that are specific to a bridge. The
Bridge Control register provides many of the same controls for the secondary interface that are provided by
the Command register for the primary interface. Some bits affect the operation of both bridge interfaces.
Address Offset
x‘3E’
Access
See individual bit fields. Reads and writes to this register behave normally for all
bits except bit 10. Writes to bit 10 are slightly different in that this bit can be reset,
but not set. The bit is reset whenever the register is written, and the data in the
corresponding bit location is a ‘1’.
Reset Value
x‘0000’
Res
e
rv
ed
Dis
c
a
rd
T
im
e
r
S
E
RR#
E
n
a
b
le
Dis
c
a
rd
T
im
e
r
S
ta
tus
S
e
condary
Disc
a
rd
T
im
e
r
P
rimary
Dis
c
a
rd
T
im
e
r
F
a
st
B
a
ck-
to
-B
ack
E
n
abl
e
S
e
condary
B
us
Reset
M
a
st
er-Abo
rt
Mode
Res
e
rv
ed
V
G
A
E
nable
IS
A
E
nabl
e
S
E
RR#
Enable
P
a
rit
y
Er
ror
R
espons
e
E
nabl
e
15 14 13 12 11 10
9
876543210
Bit(s)
Access
Field Name and Description
15:12
RO
Reserved
11
RW
Discard Timer SERR# Enable
0
Do not assert SERR# on the primary interface as a result of the expiration of either the Primary Dis-
card Timer or Secondary Discard Timer.
1
Assert SERR# on the primary interface as a result of the expiration of either the Primary Discard Timer
or Secondary Discard Timer.
This bit is ignored by a bridge in PCI-X mode.
10
RW
Discard Timer Status
0
No discard timer error
1
Discard timer error
This bit is never set for an interface that is in PCI-X mode.
9RW
Secondary Discard Timer
0
Secondary Discard Timer counts 215 PCI clock cycles
1
Secondary Discard Timer counts 210 PCI clock cycles
Ignored by the bridge if the secondary interface is in PCI-X mode.
8RW
Primary Discard Timer
0
Primary Discard Timer counts 215 PCI clock cycles
1
Primary Discard Timer counts 210 PCI clock cycles
Ignored by the bridge if the primary interface is in PCI-X mode.
7RO
Fast Back-to-Back Enable
0
Bridge does not generate fast back-to-back transactions
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