參數(shù)資料
型號(hào): DS3112
廠商: DALLAS SEMICONDUCTOR
元件分類: Digital Transmission Controller
英文描述: DATACOM, FRAMER, PBGA256
封裝: 27 X 27 MM, PLASTIC, BGA-256
文件頁數(shù): 96/134頁
文件大?。?/td> 900K
代理商: DS3112
DS3112
64 of 134
SECTION 6: M13 / E13 / G747 MULTIPLEXER AND T2 / E2 / G747 FRAMER
6.1 GENERAL DESCRIPTION
Note: If the DS3112 is used as a stand alone T3/E3 framer and the multiplexer functionality is disabled,
then the registers and functionality described in this section are not applicable and should be ignored by
the Host.
On the receive side, the T2/E2/G747 framer locates the frame boundaries of the incoming T2/E2/G747
datastream and monitors the datastream for alarms and errors. Alarms are detected and reported in T2/E2
Status Registers (T2E2SR1 and T2E2SR2) which are described in Section 6.3. The Host can force the
T2/E2/G747 framer to resynchronize via the T2E2RSY control bit in the MRID register (see Section 4.1).
On the transmit side, the device formats the outgoing datastream with the proper framing pattern and
overhead and can generate alarms. It can also inject errors for diagnostic testing purposes. The transmit
side of the framer is called the “formatter”.
T1/E1 AIS Generation
The DS3112 can generate an Alarm Indication Signal (AIS) for the T1 and E1 datastreams in both the
transmit and receive directions. AIS for T1 and E1 signals is defined as an unframed all ones pattern. On
reset, the DS3112 will force AIS in both the transmit and receive directions on all 28 T1 and 16/21 E1
datastreams. It is the Host’s task to configure the device to pass normal traffic via the T1E1RAIS1,
T1E1RAIS2, T1E1TAIS1, and T1E1TAIS2 registers. See Section 6.4 for more details.
6.2 T2 / E2 / G747 FRAMER CONTROL REGISTER DESCRIPTION
Register Name:
T2E2CR1
Register Description:
T2/E2 Control Register 1
Register Address:
30h
Bit #
7
654
321
0
Name
n/a
TRAI7
TRAI6
TRAI5
TRAI4
TRAI3
TRAI2
TRAI1
Default
-
000
0
Bit #
15
141312
1110
9
8
Name
n/a
TAIS7
TAIS6
TAIS5
TAIS4
TAIS3
TAIS2
TAIS1
Default
-
000
0
Note: Bits that are underlined are read only; all other bits are read-write.
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