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參數(shù)資料
| 型號(hào)： | DS3112 |
| 廠商： | DALLAS SEMICONDUCTOR |
| 元件分類： | Digital Transmission Controller |
| 英文描述： | DATACOM, FRAMER, PBGA256 |
| 封裝： | 27 X 27 MM, PLASTIC, BGA-256 |
| 文件頁(yè)數(shù)： | 122/134頁(yè) |
| 文件大小： | 900K |
| 代理商： | DS3112 |
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DS3112
88 of 134
Register Name:
BERTEC0
Register Description:
BERT 24-Bit Error Counter (lower) and Status Information
Register Address:
7Ch
Bit #
765
43210
Name
n/a
RA1
RA0
RLOS
BED
BBCO
BECO
SYNC
Default
---
-----
Bit #
151413
121110
9
8
Name
BEC7
BEC6
BEC5
BEC4
BEC3
BEC2
BEC1
BEC0
Default
000
00000
Note: Bits that are underlined are read only; all other bits are read-write.
Bit 0 / Real Time Synchronization Status (SYNC). Read only real time status of the synchronizer (this
bit is not latched). Will be set when the incoming pattern matches for 32 consecutive bit positions. Will
be cleared when 6 or more bits out of 64 are received in error.
Bit 1 / BERT Error Counter Overflow (BECO). A latched read only event status bit which is set when
the 24-bit BERT Error Counter (BEC) saturates. Cleared when read and will not be set again until
another overflow occurs (i.e. the BEC counter must be cleared and allowed to overflow again). The
setting of this status bit can cause a hardware interrupt to occur if the IEOF bit in BERT Control Register
0 is set to a one and the BERT bit in the Interrupt Mask for MSR (IMSR) register is set to a one. The
interrupt will be allowed to clear when this bit is read. See Figure 8.2A.
Bit 2 / BERT Bit Counter Overflow (BBCO). A latched read only event status bit which is set when
the 32-bit BERT Bit Counter (BBC) saturates. Cleared when read and will not be set again until another
overflow occurs (i.e. the BBC counter must be cleared and allowed to overflow again). The setting of
this status bit can cause a hardware interrupt to occur if the IEOF bit in BERT Control Register 0 is set to
a one and the BERT bit in the Interrupt Mask for MSR (IMSR) register is set to a one. The interrupt will
be allowed to clear when this bit is read. See Figure 8.2A.
Bit 3 / Bit Error Detected (BED). A latched read only event status bit which is set when a bit error is
detected. The receive BERT must be in synchronization for it to detect bit errors. This bit will be cleared
when read. The setting of this status bit can cause a hardware interrupt to occur if the IEBED bit in BERT
Control Register 0 is set to a one and the BERT bit in the Interrupt Mask for MSR (IMSR) register is set
to a one. The interrupt will be allowed to clear when this bit is read. See Figure 8.2A.
Bit 4 / Receive Loss Of Synchronization (RLOS). A latched read only alarm status bit which is set
whenever the receive BERT begins searching for a pattern. Once synchronization is achieved, this bit
will remain set until read. A change in this status bit (i.e. the synchronizer goes into or out of
synchronization) can cause a hardware interrupt to occur if the IESYNC bit in BERT Control Register 0
is set to a one and the BERT bit in the Interrupt Mask for MSR (IMSR) register is set to a one. The
interrupt will be allowed to clear when this bit is read. See Figure 8.2A.
Bit 5 / Receive All Zeros (RA0). A latched read only alarm status bit which is set when 31 consecutive
zeros are received. Allowed to be cleared once a one is received.
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相關(guān)代理商/技術(shù)參數(shù) |
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| DS3112+ | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC TEMPE T3/E3 MUX FRMR & M13/E13/G.747 MUX RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS3112+W | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC TEMPE T3/E3 MUX FRMR & M13/E13/G.747 MUX RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS3112D1 | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC TEMPE T3/E3 MUX FRMR & M13/E13/G.747 MUX RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS3112D1+ | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC TEMPE T3/E3 MUX FRMR & M13/E13/G.747 MUX RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS3112DK | 功能描述:網(wǎng)絡(luò)開(kāi)發(fā)工具 DS3112 Dev Kit RoHS:否 制造商:Rabbit Semiconductor 產(chǎn)品:Development Kits 類型:Ethernet to Wi-Fi Bridges 工具用于評(píng)估:RCM6600W 數(shù)據(jù)速率:20 Mbps, 40 Mbps 接口類型:802.11 b/g, Ethernet 工作電源電壓:3.3 V |
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