參數(shù)資料
型號(hào): DS3112
廠商: DALLAS SEMICONDUCTOR
元件分類: Digital Transmission Controller
英文描述: DATACOM, FRAMER, PBGA256
封裝: 27 X 27 MM, PLASTIC, BGA-256
文件頁數(shù): 106/134頁
文件大?。?/td> 900K
代理商: DS3112
DS3112
73 of 134
SECTION 7: T1 / E1 LOOPBACK AND DROP AND INSERT FUNCTIONALITY
7.1 GENERAL DESCRIPTION
On the T1 and E1 ports, the DS3112 has loopback capability in both directions. There is a per port Line
Loopback which loops the receive side back to the transmit side and a per port Diagnostic Loopback
which loops the transmit side back to the receive side. In addition, the device can detect the T1 Line
Loopback Command as well as generate it. Also, the DS3112 has two Drop and Insert Ports which allow
any two of the 28 T1 or 16/21 E1 datastreams to be dropped or inserted from two auxiliary ports. All of
these functions are described below.
T1/E1 Line Loopback
Each of the 28 T1 or 16/21 E1 receive demultiplexed ports can be looped back to the transmit side. This
loopback is called a Line Loopback and is shown in the Block Diagrams in Section 1. When the Line
Loopback is invoked, the normal transmit data input at the LTCLK and LTDAT inputs is ignored and
replaced with the data from the associated receive port. The Line Loopback is invoked by the Host via
the T1E1LLB1 and T1E1LLB2 control registers (see Section 7.2).
T1/E1 Diagnostic Loopback
Each of the 28 T1 or 16/21 E1 transmit multiplexed ports can be looped back to the receive side. This
loopback is called a Diagnostic Loopback and is shown in the Block Diagrams in Section 1. When the
Diagnostic Loopback is invoked, the normal receive data output at the LRCLK and LRDAT outputs is
replaced with the data from the associated transmit port. The Diagnostic Loopback is invoked by the
Host via the T1E1DLB1 and T1E1DLB2 control registers (see Section 7.2).
T1 Line Loopback Command
M13 systems have the ability to request that a T1 line be looped back. This is achieved by inverting the
C3 bit. See Section 14.2 for details on M13 formats and operation. The DS3112 will detect when the C3
bit has been inverted and will indicate which T1 line is being requested to be placed into Line Loopback
via the T1LBSR1 and T1LBSR2 registers (see Section 7.3). When the Host detects that the a T1 line is
being requested to be placed into loopback, it should set the appropriate control bit in either the
T1E1LLB1 or T1E1LLB2 register. The DS3112 can also generate a T1 Line Loopback Command by
inverting the C3 bit. This is accomplished via the T1LBCR1 and L1LBCR2 registers (see Section 7.2).
Please note that when E3 or G747 mode is enabled, the T1 Line Loopback Command functionality is not
applicable.
T1/E1 Drop and Insert
The DS3112 has the ability to drop any of the 28 T1 or 16/21 E1 receive channels to either one of two
drop ports. The drop ports are Drop Port A and Drop Port B and they consist of the outputs
LRCLKA/LRDATA and LRCLKB/LRDATB respectively. See the Block Diagrams in Section 1 for
more details. The Host can determine which T1/E1 port should be dropped via the T1E1SDP control
register (see Section 7.4).
When a T1/E1 channel is dropped to either Drop Port A or B, the
demultiplexed data is still output at the normal LRCLK and LRDAT outputs. On the transmit side, there
are a complimentary pair of Insert Ports which are controlled via the T1E1SIP control register (see
Section 7.4).
When enabled, the inserted port data and clock (LTDATA/LTDATB and
LTCLKA/LTCLKB respectively) replaces the data that would normally be multiplexed in at LTDAT and
LTCLK inputs.
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