參數資料
型號： DS3112
廠商： DALLAS SEMICONDUCTOR
元件分類： Digital Transmission Controller
英文描述： DATACOM, FRAMER, PBGA256
封裝： 27 X 27 MM, PLASTIC, BGA-256
文件頁數： 84/134頁
文件大?。?/td> 900K
代理商： DS3112
DS3112
53 of 134
5.3 T3 / E3 FRAMER STATUS and INTERRUPT REGISTER DESCRIPTION
Register Name:
T3E3SR
Register Description:
T3/E3 Status Register
Register Address:
12h
Bit #
765
43210
Name
n/a
RSOF
TSOF
T3IDLE
RAI
AIS
LOF
LOS
Default
---
-----
Bit #
151413
121110
9
8
Name
n/a
Default
---
-----
Note: See Figure 5.3A for details on the signal flow for the status bits in the T3E3SR register.
Note: Bits that are underlined are read only; all other bits are read-write.
Bit 0 / Loss Of Signal Occurrence (LOS). This latched read only alarm status bit will be set to a one
when the T3 or E3 framer detects a loss of signal. This bit will be cleared when read unless a LOS
condition still exists. A change in state of the LOS can cause a hardware interrupt to occur if the LOS bit
in the Interrupt Mask for T3E3SR (IT3E3SR) register is set to a one and the T3E3SR bit in the Interrupt
Mask for MSR (IMSR) register is set to a one. The interrupt will be allowed to clear when this bit is
read. The LOS alarm criteria is described in Tables 5.3A and 5.3B
Bit 1 / Loss Of Frame Occurrence (LOF). This latched read only alarm status bit will be set to a one
when the T3 or E3 framer detects a loss of frame. This bit will be cleared when read unless a LOF
condition still exists. A change in state of the LOF can cause a hardware interrupt to occur if the LOF bit
in the Interrupt Mask for T3E3SR (IT3E3SR) register is set to a one and the T3E3SR bit in the Interrupt
Mask for MSR (IMSR) register is set to a one. The interrupt will be allowed to clear when this bit is read.
The LOF alarm criteria is described in Tables 5.3A and 5.3B
Bit 2 / Alarm Indication Signal Detected (AIS). This latched read only alarm status bit will be set to a
one when the T3 or E3 framer detects an incoming Alarm Indication Signal. This bit will be cleared
when read unless an AIS signal is still present. A change in state of the AIS detection can cause a
hardware interrupt to occur if the AIS bit in the Interrupt Mask for T3E3SR (IT3E3SR) register is set to a
one and the T3E3SR bit in the Interrupt Mask for MSR (IMSR) register is set to a one. The interrupt will
be allowed to clear when this bit is read. The AIS alarm detection criteria is described in Tables 5.3A and
5.3B
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相關代理商/技術參數
參數描述
DS3112+ 功能描述:網絡控制器與處理器 IC TEMPE T3/E3 MUX FRMR & M13/E13/G.747 MUX RoHS:否 制造商:Micrel 產品:Controller Area Network (CAN) 收發(fā)器數量: 數據速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS3112+W 功能描述:網絡控制器與處理器 IC TEMPE T3/E3 MUX FRMR & M13/E13/G.747 MUX RoHS:否 制造商:Micrel 產品:Controller Area Network (CAN) 收發(fā)器數量: 數據速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS3112D1 功能描述:網絡控制器與處理器 IC TEMPE T3/E3 MUX FRMR & M13/E13/G.747 MUX RoHS:否 制造商:Micrel 產品:Controller Area Network (CAN) 收發(fā)器數量: 數據速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS3112D1+ 功能描述:網絡控制器與處理器 IC TEMPE T3/E3 MUX FRMR & M13/E13/G.747 MUX RoHS:否 制造商:Micrel 產品:Controller Area Network (CAN) 收發(fā)器數量: 數據速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS3112DK 功能描述:網絡開發(fā)工具 DS3112 Dev Kit RoHS:否 制造商:Rabbit Semiconductor 產品:Development Kits 類型:Ethernet to Wi-Fi Bridges 工具用于評估:RCM6600W 數據速率:20 Mbps, 40 Mbps 接口類型:802.11 b/g, Ethernet 工作電源電壓:3.3 V
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