參數(shù)資料
型號(hào): AMD-K5
廠商: Advanced Micro Devices, Inc.
英文描述: 32-Bit Superior Price/Performance Value Microprocessor(32位高性/價(jià)比微處理器)
中文描述: 32位卓越的價(jià)格/性能值微處理器(32位高性/價(jià)比微處理器)
文件頁(yè)數(shù): 63/100頁(yè)
文件大?。?/td> 2533K
代理商: AMD-K5
53
18522F/0—Jan1997
AMD-K5 Processor Data Sheet
PRELIMINARY INFORMATION
Initial State Upon
Entering SMM
Table 13 shows the initial state of the processor upon entering
SMM.
The default SMBASE value may be changed following reset to
store the SMI handler code and CPU state information in a dif-
ferent region of memory. If the SMBASE value is changed, the
next entry to the SMI handler routine will occur relative to the
new SMBASE value.
I/O Instruction
Restart
The SMI handler may allow the RSM instruction to restart the
interrupted I/O instruction by using the I/O instruction restart
word. If the value contained by the I/O instruction restart
word is 0FFh, the processor re-executes the I/O instruction
trapped by SMI.
The I/O instruction is not re-executed if the I/O restart word
contains the value 000h. The value 000h is written in the I/O
restart word when entering SMM. Processor operation is
Table 13. Initial State Upon Entering SMM
Register
Initial Contents
Selector
3000h
0000h
0000h
0000h
0000h
0000h
Base
Attributes
16-bit, expand-up
16-bit, expand-up
16-bit, expand-up
16-bit, expand-up
16-bit, expand-up
16-bit, expand-up
Unmodified
0000_0002h
0000_8000h
Limit
4 Gbytes
4 Gbytes
4 Gbytes
4 Gbytes
4 Gbytes
4 Gbytes
CS
DS
ES
FS
GS
SS
0003_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
General-Purpose
EFLAGS
EIP
CR0
CR4
GDTR
LDTR
IDTR
TR
DR7
DR6
Bits 0, 2, 3, 31 cleared (PE, EM, TS, PG). Others are unmodified.
0000_0000h
Unmodified
Unmodified
Unmodified
Unmodified
0000_0400h
Undefined
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