參數(shù)資料
型號: AD9558/PCBZ
廠商: Analog Devices Inc
文件頁數(shù): 9/104頁
文件大?。?/td> 0K
描述: BOARD EVAL FOR AD9558
產(chǎn)品變化通告: AD9558 Minor Metal Mask Change 17/Apr/2012
設(shè)計資源: AD9558 Eval Brd BOM
AD9558 Schematic
標(biāo)準(zhǔn)包裝: 1
系列: *
AD9558
Data Sheet
Rev. B | Page 12 of 104
SERIAL PORT SPECIFICATIONS—SPI MODE
Table 15.
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
AA
CSEE
Input Logic 1 Voltage
2.0
V
Input Logic 0 Voltage
0.8
V
Input Logic 1 Current
60
A
Input Logic 0 Current
100
A
Input Capacitance
2
pF
SCLK
Internal 30 k pull-down resistor
Input Logic 1 Voltage
2.0
V
Input Logic 0 Voltage
0.8
V
Input Logic 1 Current
200
A
Input Logic 0 Current
1
A
Input Capacitance
2
pF
SDIO
As an Input
Input Logic 1 Voltage
2.0
V
Input Logic 0 Voltage
0.8
V
Input Logic 1 Current
1
A
Input Logic 0 Current
1
A
Input Capacitance
2
pF
As an Output
Output Logic 1 Voltage
DVDD3 0.6
V
1 mA load current
Output Logic 0 Voltage
0.4
V
1 mA load current
SDO
Output Logic 1 Voltage
DVDD3 0.6
V
1 mA load current
Output Logic 0 Voltage
0.4
V
1 mA load current
TIMING
SCLK
Clock Rate, 1/tCLK
40
MHz
Pulse Width High, tHIGH
10
ns
Pulse Width Low, tLOW
13
ns
SDIO to SCLK Setup, tDS
3
ns
SCLK to SDIO Hold, tDH
6
ns
SCLK to Valid SDIO and SDO, tDV
10
ns
AA
CSEE
AA
to SCLK Setup (tS)
10
ns
AA
CSEE
AA
to SCLK Hold (tC)
0
ns
AA
CSEE
AA
Minimum Pulse Width High
6
ns
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參數(shù)描述
AD9559 制造商:AD 制造商全稱:Analog Devices 功能描述:Dual PLL, Quad Input, Multiservice Line Card Adaptive Clock Translator
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AD9559BCPZ-REEL7 功能描述:時鐘發(fā)生器及支持產(chǎn)品 Multi-protocol line card dual clock RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
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