fR = inp" />
參數(shù)資料
型號: AD9558/PCBZ
廠商: Analog Devices Inc
文件頁數(shù): 18/104頁
文件大?。?/td> 0K
描述: BOARD EVAL FOR AD9558
產(chǎn)品變化通告: AD9558 Minor Metal Mask Change 17/Apr/2012
設(shè)計資源: AD9558 Eval Brd BOM
AD9558 Schematic
標準包裝: 1
系列: *
AD9558
Data Sheet
Rev. B | Page 20 of 104
TYPICAL PERFORMANCE CHARACTERISTICS
fR = input reference clock frequency; fOUT = output clock frequency; fSYS = SYSCLK input frequency; fS = internal system clock frequency;
LF = SYSCLK PLL internal loop filter used. AVDD, AVDD3, and DVDD at nominal supply voltage; fS = 786.432 MHz, unless otherwise noted.
–160
–150
–140
–130
–120
–110
–100
–90
–80
–70
–60
1k
100
10k
100k
1M
10M
100M
PH
A
SE
N
O
ISE
(d
B
c
/H
z)
FREQUENCY OFFSET (Hz)
INTEGRATED RMS JITTER (12kHz TO 20MHz): 296fs
09758-
003
Figure 3. Absolute Phase Noise (Output Driver = HSTL),
fR = 19.44 MHz, fOUT = 622.08 MHz,
DPLL Loop BW = 50 Hz, fSYS = 49.152 MHz Crystal
–160
–150
–140
–130
–120
–110
–100
–90
–80
–70
–60
1k
100
10k
100k
1M
10M
100M
PH
A
SE
N
O
ISE
(d
B
c
/H
z)
FREQUENCY OFFSET (Hz)
INTEGRATED RMS JITTER (12kHz TO 20MHz): 320fs
09758-
004
Figure 4. Absolute Phase Noise (Output Driver = HSTL),
fR = 19.44 MHz, fOUT = 644.53125 MHz,
DPLL Loop BW = 50 Hz, fSYS = 49.152 MHz Crystal
–160
–150
–140
–130
–120
–110
–100
–90
–80
–70
–60
1k
100
10k
100k
1M
10M
100M
PH
A
SE
N
O
ISE
(d
B
c
/H
z)
FREQUENCY OFFSET (Hz)
INTEGRATED RMS JITTER (12kHz TO 20MHz): 285fs
09758-
005
Figure 5. Absolute Phase Noise (Output Driver = HSTL),
fR = 19.44 MHz, fOUT = 693.482991 MHz,
DPLL Loop BW = 50 Hz, fSYS = 49.152 MHz Crystal
–160
–150
–140
–130
–120
–110
–100
–90
–80
–70
1k
100
10k
100k
1M
10M
100M
PH
A
SE
N
O
ISE
(d
B
c
/H
z)
FREQUENCY OFFSET (Hz)
INTEGRATED RMS JITTER (12kHz TO 20MHz): 301fs
09758-
006
Figure 6. Absolute Phase Noise (Output Driver = HSTL),
fR = 19.44 MHz, fOUT = 174.703 MHz,
DPLL Loop BW = 1 kHz, fSYS = 49.152 MHz Crystal
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