參數(shù)資料
型號(hào): AD9558/PCBZ
廠商: Analog Devices Inc
文件頁(yè)數(shù): 72/104頁(yè)
文件大小: 0K
描述: BOARD EVAL FOR AD9558
產(chǎn)品變化通告: AD9558 Minor Metal Mask Change 17/Apr/2012
設(shè)計(jì)資源: AD9558 Eval Brd BOM
AD9558 Schematic
標(biāo)準(zhǔn)包裝: 1
系列: *
Data Sheet
AD9558
Rev. B | Page 7 of 104
REFERENCE INPUTS
Table 7.
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
DIFFERENTIAL OPERATION
Frequency Range
Sinusoidal Input
10
750
MHz
LVPECL Input
0.002
1250
MHz
The reference input divide-by-2 block must be
engaged for fIN > 705 MHz
LVDS Input
0.002
750
MHz
The reference input divide-by-2 block must be
engaged for fIN > 705 MHz
Minimum Input Slew Rate
40
V/μs
Minimum limit imposed for jitter performance
Common-Mode Input Voltage
AC-Coupled
1.9
2
2.2
V
Internally generated
DC-Coupled
1.0
2.4
V
Differential Input Voltage Sensitivity
mV
Minimum differential voltage across pins is required to
ensure switching between logic levels; instantaneous
voltage on either pin must not exceed the supply rails
fIN < 800 MHz
240
mV
fIN = 800 to 1050 MHz
320
mV
fIN = 1050 to 1250 MHz
400
mV
Differential Input Voltage Hysteresis
58
100
mV
Input Resistance
21
k
Input Capacitance
3
pF
Minimum Pulse Width High
LVPECL
390
ps
LVDS
640
ps
Minimum Pulse Width Low
LVPECL
390
ps
LVDS
640
ps
SINGLE-ENDED OPERATION
Frequency Range (CMOS)
0.002
300
MHz
Minimum Input Slew Rate
40
V/μs
Minimum limit imposed for jitter performance
Input Voltage High (VIH)
1.2 V to 1.5 V Threshold Setting
1.0
V
1.8 V to 2.5 V Threshold Setting
1.4
V
3.0 V to 3.3 V Threshold Setting
2.0
V
Input Voltage Low (VIL)
1.2 V to 1.5 V Threshold Setting
0.35
V
1.8 V to 2.5 V Threshold Setting
0.5
V
3.0 V to 3.3 V Threshold Setting
1.0
V
Input Resistance
47
k
Input Capacitance
3
pF
Minimum Pulse Width High
1.5
ns
Minimum Pulse Width Low
1.5
ns
相關(guān)PDF資料
PDF描述
GBM22DSAH CONN EDGECARD 44POS R/A .156 SLD
DK-2632-03 CABLE FIBER OPTIC DUAL LC-SC 3M
GEM30DTAS CONN EDGECARD 60POS R/A .156 SLD
GMM12DRXI CONN EDGECARD 24POS DIP .156 SLD
P1330R-105K INDUCTOR POWER 1000.0UH SMD
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD9559 制造商:AD 制造商全稱(chēng):Analog Devices 功能描述:Dual PLL, Quad Input, Multiservice Line Card Adaptive Clock Translator
AD9559/PCBZ 功能描述:時(shí)鐘和定時(shí)器開(kāi)發(fā)工具 Multi-protocol line card dual clock RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Modules 類(lèi)型:Clock Conditioners 工具用于評(píng)估:LMK04100B 頻率:122.8 MHz 工作電源電壓:3.3 V
AD9559BCPZ 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 Multi-protocol line card dual clock RoHS:否 制造商:Silicon Labs 類(lèi)型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
AD9559BCPZ-REEL7 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 Multi-protocol line card dual clock RoHS:否 制造商:Silicon Labs 類(lèi)型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
AD9559PCBZ 制造商:AD 制造商全稱(chēng):Analog Devices 功能描述:Dual PLL, Quad Input, Multiservice Line Card Adaptive Clock Translator