參數(shù)資料
型號(hào)： MB86964PFV-G
元件分類： 微控制器/微處理器
英文描述： 2 CHANNEL(S), 10M bps, LOCAL AREA NETWORK CONTROLLER, PQFP100
封裝： SHRINK, PLASTIC, QFP-100
文件頁(yè)數(shù)： 10/52頁(yè)
文件大?。?/td> 373K
代理商： MB86964PFV-G
MB86964
18
The encoder also monitors the state of the internal transmit en-
able signal from the transmitter section and appends an end-of-
packet symbol (illegal Manchester code) to the data stream
when that signal is negated at the end of the CRC field of the
transmitted packet.
Transmitter Circuits
The transceiver’s transmitter section receives the encoded data
from the Manchester encoder and transfers it to either the AUI
cable via the the DO circuit or the twisted-pair network via the
TPO circuit. Advanced integrated pulse-shaping and filtering
produces an output signal that is predistorted and prefiltered to
meet the 10BASE-T jitter template on the TPON and TPOP
pins, so that no external filters are required.
During idle periods, the MB86964 transmits link integrity test
pulses on the TPO circuit if LINK TEST EN, BMPR13<5>, is
asserted and the AUI/TP port select bit, BMPR13<4> is set for
twisted-pair (TP) operation (or if the transceiver is set for auto-
matic port selection via BMPR13<3> and the TP port is auto-
selected). The MB86964 is programmed for either shielded
(150
) or unshielded (100) twisted-pair through the STP/
UTP bit BMBR13<2>.
Jabber Control
An on-chip watchdog timer prevents the chip from locking into
a continuous transmit mode. When a transmission exceeds the
maximum time limit (specified for the MB86964 as 20 to 150
msec), the watchdog timer disables the transmit and loopback
functions and asserts the JABBER error status bit, DLCR0<3>,
generating an interrupt if so enabled. Before the MB86964 can
exit the jabber state, the transmit data circuit must remain idle
for between 0.25 and 0.75 seconds.
SQE Test
The transceiver supports the signal quality error (SQE) test
function specified in the standard. After every successful trans-
mission on the 10BASE-T network, the MB86964 transceiver
section transmits the SQE signal to the controller for 10
±5 bit
times over the internal CI circuit. BMPR15<1> reflects the sta-
tus of this SQE test.
Receive Input Circuits
Valid received signals from the twisted-pair network connec-
tion (the TPI circuit) or from the AUI network connection (the
DI circuit) pass through on-chip filters to the data decoder. No
external filters are required.
An internal intelligent squelch function discriminates noise
from link test pulses and valid data streams. The receiver is ac-
tivated only by valid data streams above the squelch level and
with proper timing. If the differential signal at the TPI or the DI
circuit inputs falls below 75% of the threshold level (uns-
quelched) for eight bit times (typical), the receiver enters the
idle state.
The squelch threshold can be controlled via
BMPR13<6>.
Data Decoder
The data decoder section performs three functions on the re-
ceived data: clock recovery, carrier detection, and Manchester
data decoding. Carrier detection is indicated to the receiver
section by assertion of the internal carrier sense signal, which
occurs shortly after the received data signals appear. Carrier
sense status can be monitored via DLCR0<6>. Clock recovery
and data separation are accomplished by an internal phase-
locked loop. The recovered clock is supplied to the receiver to-
gether with the recovered NRZ serial data stream.
Reverse Polarity
The transceiver polarity reverse circuit uses link pulses and
end-of-frame data to determine the polarity of the received sig-
nal. A reversed polarity condition is detected when eight oppo-
site receive link pulses are detected without receipt of a link
pulse of the expected polarity. Reversed polarity is also de-
tected if four frames are received with a reversed start-of-idle.
Whenever polarity is reversed, these two counters are reset to
zero. If the transceiver enters the link fail state and no valid
data or link pulses are received within 96 to 128 milliseconds,
polarity resets to the default uninverted condition. If Link In-
tegrity testing is disabled, polarity detection is based only on
received data.
The transceiver automatically corrects reversed polarity. Po-
larity reversal is reported via BMPR15<3>.
Collision Detection
The collision detection function operates on the twisted-pair
side of the interface. A collision is defined as the simultaneous
presence of valid signals on both the TPI circuit and the TPO
circuit. The transceiver reports collisions to the back-end via
an internal signal. If the TPI circuit is active while there is ac-
tivity on the TPO circuit, the TPI data passes to the back-end as
received data, disabling normal loopback.
Loopback
The MB86964 provides the automatic local loopback function
specified by the 10BASE-T standard for the twisted-pair port.
This function is in effect except when the LBC bit, DLCR4<1>,
is asserted.
Data transmitted by the transmitter is passed
through the data encoder, internally looped back within the
MB86964 before the TPO drivers to the data decoder and re-
turned to the receiver. This local loopback function is disabled
when a data collision occurs, clearing the received data circuit
in the transceiver for the data arriving at the twisted-pair inputs.
The local loopback is also disabled during the link fail and jab-
ber states.
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