961
SAM4CP [DATASHEET]
43051E–ATPL–08/14
41.5.6 AES Interrupt Status Register
Name:
AES_ISR
Address:
0x4000001C
Access:
Read-only
DATRDY: Data Ready
0: Output data not valid.
1: Encryption or decryption process is completed.
DATRDY is cleared when a Manual encryption/decryption occurs (START bit in AES_CR) or when a software triggered hardware
reset of the AES interface is performed (SWRST bit in AES_CR).
AES_MR.LOD = 0:
In Manual and Auto mode, the DATRDY flag can also be cleared when at least one of the Output Data Registers is read.
In PDC mode, DATRDY is set and cleared automatically.
AES_MR.LOD = 1:
In Manual and Auto mode, the DATRDY flag can also be cleared when at least one of the Input Data Registers is written.
In PDC mode, DATRDY is set and cleared automatically.
ENDRX: End of RX Buffer
0: The Receive Counter Register has not reached 0 since the last write in AES_RCR or AES_RNCR.
1: The Receive Counter Register has reached 0 since the last write in AES_RCR or AES_RNCR.
Note:
This flag must be used only in PDC mode with AES_MR.LOD bit cleared.
ENDTX: End of TX Buffer
0: The Transmit Counter Register has not reached 0 since the last write in AES_TCR or AES_TNCR.
1: The Transmit Counter Register has reached 0 since the last write in AES_TCR or AES_TNCR.
Note:
This flag must be used only in PDC mode with AES_MR.LOD bit set.
RXBUFF: RX Buffer Full
0: AES_RCR or AES_RNCR has a value other than 0.
1: Both AES_RCR and AES_RNCR have a value of 0.
Note:
This flag must be used only in PDC mode with AES_MR.LOD bit cleared.
31
–
30
–
29
–
28
–
27
–
26
–
25
–
24
–
23
–
22
–
21
–
20
–
19
–
18
–
17
–
16
TAGRDY
15
14
13
12
11
–
10
–
9
–
8
URAT
URAD
7
–
6
–
5
–
4
3
2
1
0
TXBUFE
RXBUFF
ENDTX
ENDRX
DATRDY