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SAM4CP [DATASHEET]
43051E–ATPL–08/14
36.6.9 Register Write Protection
To prevent any single software error from corrupting USART behavior, certain registers in the address space can be
write-protected by setting the WPEN bit in the
“USART Write Protection Mode Register”
(US_WPMR).
If a write access to a write-protected register is detected, the WPVS flag in the
“USART Write Protection Status Register”
(US_WPSR) is set and the field WPVSRC indicates the register in which the write access has been attempted.
The WPVS bit is automatically cleared after reading the US_WPSR.
The following registers can be write-protected:
“USART Mode Register”
“USART Baud Rate Generator Register”
“USART Receiver Time-out Register”
“USART Transmitter Timeguard Register”
“USART FI DI RATIO Register”
“USART IrDA Filter Register”
“USART Manchester Configuration Register”
36.7
Universal Synchronous Asynchronous Receiver Transmitter (USART) User Interface
Table 36-14. Register Mapping
Offset
Register
Name
Access
Reset
0x0000
Control Register
US_CR
Write-only
–
0x0004
Mode Register
US_MR
Read/Write
–
0x0008
Interrupt Enable Register
US_IER
Write-only
–
0x000C
Interrupt Disable Register
US_IDR
Write-only
–
0x0010
Interrupt Mask Register
US_IMR
Read-only
0x0
0x0014
Channel Status Register
US_CSR
Read-only
–
0x0018
Receive Holding Register
US_RHR
Read-only
0x0
0x001C
Transmit Holding Register
US_THR
Write-only
–
0x0020
Baud Rate Generator Register
US_BRGR
Read/Write
0x0
0x0024
Receiver Time-out Register
US_RTOR
Read/Write
0x0
0x0028
Transmitter Timeguard Register
US_TTGR
Read/Write
0x0
0x2C - 0x3C
Reserved
–
–
–
0x0040
FI DI Ratio Register
US_FIDI
Read/Write
0x174
0x0044
Number of Errors Register
US_NER
Read-only
–
0x0048
Reserved
–
–
–
0x004C
IrDA Filter Register
US_IF
Read/Write
0x0
0x0050
Manchester Configuration Register
US_MAN
Read/Write
0x30011004
0x0054 - 0x005C
Reserved
–
–
–
0x0060 - 0x00E0
Reserved
–
–
–
0x00E4
Write Protection Mode Register
US_WPMR
Read/Write
0x0
0x00E8
Write Protection Status Register
US_WPSR
Read-only
0x0
0x00EC - 0x00FC
Reserved
–
–
–
0x100 - 0x128
Reserved for PDC Registers
–
–
–