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參數(shù)資料
| 型號： | DS3131 |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | Telecom IC:Other |
| 英文描述： | SPECIALTY TELECOM CIRCUIT, PBGA256 |
| 封裝： | 27 X 27 MM, PLASTIC, BGA-256 |
| 文件頁數(shù)： | 9/174頁 |
| 文件大小： | 1261K |
| 代理商： | DS3131 |
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DS3131
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Figure 9-16. Transmit Packet Descriptors
dword 0
Data Buffer Address (32)
dword 1
EOF
CV
unused
Byte Count (13)
Next Descriptor Pointer (16)
dword 2
unused (26)
HDLC CH# (6)
dword 3
unused (15)
PV
Next Pending Descriptor Pointer (16)
Note 1:
The organization of the transmit descriptor is not affected by the enabling of Big Endian.
Note 2:
The format of the transmit descriptor is almost identical to the receive descriptor; this lessens the burden of the host in preparing
descriptors in store-and-forward applications.
dword 0; Bits 0 to 31/Data Buffer Address. Direct 32-bit starting address of the data buffer that is associated
with this transmit descriptor.
dword 1; Bits 0 to 15/Next Descriptor Pointer. This 16-bit value is the offset from the transmit descriptor base
address of the next descriptor in the chain. Only valid if EOF = 0 (next descriptor in the same packet chain) or if
EOF = 1 and CV = 1 (first descriptor in the next packet).
dword 1; Bits 16 to 28/Byte Count. Number of bytes stored in the data buffer. Maximum is 8191 Bytes (0000h =
0 Bytes / 1FFFh = 8191 Bytes).
dword 1; Bit 29/Unused. This bit is ignored by the transmit DMA and can be set to any value.
dword 1; Bit 30/Chain Valid (CV). If CV is set to 1 when EOF = 1, then this indicates that the next descriptor
pointer field is valid and corresponds to the first descriptor of the next packet that is queued up for transmission.
The CV bit is ignored when EOF = 0.
dword 1; Bit 31/End of Frame (EOF). When set to 1, this bit indicates that the descriptor is the last buffer in the
current packet. When set to 0, this bit indicates that next descriptor pointer field is valid and points to the next
descriptor in the packet chain.
dword 2; Bits 0 to 5/HDLC Channel Number. HDLC channel number, which can be from 1 to 40.
000000 (00h) = HDLC channel number 1
100111 (27h) = HDLC channel number 40
dword 2; Bits 6 to 31/Unused. These bits are ignored by the transmit DMA and can be set to any value.
dword 3; Bits 0 to 15/Next Pending Descriptor Pointer. This 16-bit value is the offset from the transmit
descriptor base address to another descriptor chain that is queued up for transmission. The transmit DMA can store
up to two queued packet chains internally, but additional packet chains must be stored as a link list by the transmit
DMA using this field. This field is only valid if PV = 1, and it should be set to 0000h by the host when the host is
preparing the descriptor.
dword 3; Bit 16/Pending Descriptor Valid (PV). If set, this bit indicates that the next pending descriptor pointer
field is valid and corresponds to the first descriptor of the next packet chain that is queued up for transmission.
This field is written to by the transmit DMA to link descriptors together and should always be set to 0 by the host.
dword 3; Bits 17 to 31/Unused. These bits are ignored by the transmit DMA and can be set to any value.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS3131DK | 功能描述:通信集成電路 - 若干 RoHS:否 制造商:Maxim Integrated 類型:Transport Devices 封裝 / 箱體:TECSBGA-256 數(shù)據(jù)速率:100 Mbps 電源電壓-最大:1.89 V, 3.465 V 電源電壓-最小:1.71 V, 3.135 V 電源電流:50 mA, 225 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Tube |
| DS3134 | 功能描述:IC CTRLR HDLC CHATEAU 256-BGA RoHS:否 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A |
| DS-313PIN | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog Miscellaneous |
| DS-313-PIN | 功能描述:信號調(diào)節(jié) RoHS:否 制造商:EPCOS 產(chǎn)品:Duplexers 頻率:782 MHz, 751 MHz 頻率范圍: 電壓額定值: 帶寬: 阻抗:50 Ohms 端接類型:SMD/SMT 封裝 / 箱體:2.5 mm x 2 mm 工作溫度范圍:- 30 C to + 85 C 封裝:Reel |
| DS31400 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:8-Input, 14-Output, Dual DPLL Timing IC with Sub-ps Output Jitter |
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