參數(shù)資料
型號： DS3131
廠商： MAXIM INTEGRATED PRODUCTS INC
元件分類： Telecom IC:Other
英文描述： SPECIALTY TELECOM CIRCUIT, PBGA256
封裝： 27 X 27 MM, PLASTIC, BGA-256
文件頁數(shù)： 170/174頁
文件大?。?/td> 1261K
代理商： DS3131
DS3131
95 of 174
- FOR DMA USE ONLY/HOST CAN ONLY READ THIS FIELD -
dword 2; Bits 10 to 14/DMA Reserved. Could be any value when read. Should be set to 0 when written to by the
host.
- FOR DMA USE ONLY/HOST CAN ONLY READ THIS FIELD -
dword 2; Bit 15/First Buffer Fill (FBF). This bit is set to 1 by the receive DMA when it is in the process of
filling the first buffer of a packet. The DMA uses this bit to determine when to switch to large buffers when the
buffer size-select field is set to 10.
- FOR DMA USE ONLY/HOST CAN ONLY READ THIS FIELD -
dword 2; Bits 16 to 28/Byte Count. The DMA uses these 13 bits to keep track of the number of bytes stored in
the data buffer. Maximum is 8191 Bytes (0000h = 0 Bytes / 1FFFh = 8191 Bytes).
- FOR DMA USE ONLY/HOST CAN ONLY READ THIS FIELD -
dword 2; Bits 29 to 31/Threshold Count. These bits keep track of the number of data buffers that have been
filled so that the receive DMA knows when, based on the host-controlled threshold, to write to the done queue.
000 = threshold count is 0 data buffers
001 = threshold count is 1 data buffer
010 = threshold count is 2 data buffers
011 = threshold count is 3 data buffers
100 = threshold count is 4 data buffers
101 = threshold count is 5 data buffers
110 = threshold count is 6 data buffers
111 = threshold count is 7 data buffers
Register Name:
RDMACIS
Register Description:
Receive DMA Channel Configuration Indirect Select
Register Address:
0770h
Bit #
7
6
5
4
3
2
1
0
Name
reserved
HCID5
HCID4
HCID3
HCID2
HCID1
HCID0
Default
0
Bit #
15
14
13
12
11
10
9
8
Name
IAB
IARW
reserved
RDCW2
RDCW1
RDCW0
Default
0
Note:
Bits that are underlined are read-only; all other bits are read-write.
Bits 0 to 5/HDLC Channel ID (HCID0 to HCID5)
000000 (00h) = HDLC channel number 1
100111 (27h) = HDLC channel number 40
Bits 8 to 10/Receive DMA Configuration RAM Word Select Bits 0 to 2 (RDCW0 to RDCW2)
000 = lower word of dword 0
001 = upper word of dword 0
010 = lower word of dword 1
011 = upper word of dword 1
100 = lower word of dword 2 (only word that the host can write to)
101 = upper word of dword 2
110 = illegal state
111 = illegal state
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