參數(shù)資料
型號： DS3131
廠商： MAXIM INTEGRATED PRODUCTS INC
元件分類： Telecom IC:Other
英文描述： SPECIALTY TELECOM CIRCUIT, PBGA256
封裝： 27 X 27 MM, PLASTIC, BGA-256
文件頁數(shù)： 33/174頁
文件大小： 1261K
代理商： DS3131
DS3131
128 of 174
10.2 PCI Configuration Register Description
Register Name:
PVID0
Register Description:
PCI Vendor ID/Device ID Register 0
Register Address:
0x000h
LSB
Vendor ID (Read Only/Set to EAh)
Vendor ID (Read Only/Set to 13h)
Device ID (Read Only/Set to 31h)
MSB
Device ID (Read Only/Set to 31h)
Bits 0 to 15/Vendor ID. These read-only bits identify Dallas Semiconductor as the device’s manufacturer. The
vendor ID was assigned by the PCI Special Interest Group and is fixed at 13EAh.
Bits 16 to 31/Device ID. These read-only bits identify the DS3131 as the device being used. The device ID was
assigned by Dallas Semiconductor and is fixed at 3131h.
Register Name:
PCMD0
Register Description:
PCI Command/Status Register 0
Register Address:
0x004h
LSB
STEPC
PARC
VGA
MWEN
SCC
MASC
MSC
IOC
Reserved (Read Only/Set to All Zeros)
FBBEN
PSEC
FBBCT
UDF
66MHz
Reserved (Read Only/Set to All Zeros)
MSB
PPE
PSE
MABT
TABTM
TABT
DTS1
DTS0
PARR
Note:
Read-only bits in the PCMD0 register are underlined; all other bits are read-write.
The lower word (bits 0 to 15) of the PCMD0 register is the command portion and is used for PCI bus control.
When all bits in the lower word are set to 0, the device is logically disconnected from the bus for all accesses,
except for accesses to the configuration registers. The upper word (bits 16 to 31) is the status portion and is used
for status information. Reads to the status portion behave normally but writes are unique in that bits can be reset
(i.e., forced to 0) but not set (i.e., forced to 1). A bit in the status portion resets when 1 is written to that bit
position. Bit positions that have 0 written to them do not reset.
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