- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄11203 > ADUC7032BSTZ-88-RL (Analog Devices Inc)IC MCU 96K FLASH DUAL 48LQFP PDF資料下載
參數(shù)資料
| 型號(hào)： | ADUC7032BSTZ-88-RL |
| 廠(chǎng)商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 86/120頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC MCU 96K FLASH DUAL 48LQFP |
| 標(biāo)準(zhǔn)包裝： | 2,000 |
| 系列： | MicroConverter® ADuC7xxx |
| 核心處理器： | ARM7 |
| 芯體尺寸： | 16/32-位 |
| 速度： | 20.48MHz |
| 連通性： | LIN，SPI，UART/USART |
| 外圍設(shè)備： | POR，PSM，溫度傳感器，WDT |
| 輸入/輸出數(shù)： | 9 |
| 程序存儲(chǔ)器容量： | 96KB（48K x 16） |
| 程序存儲(chǔ)器類(lèi)型： | 閃存 |
| RAM 容量： | 1.5K x 32 |
| 電壓 - 電源 (Vcc/Vdd)： | 3.5 V ~ 18 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 2x16b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 105°C |
| 封裝/外殼： | 48-LQFP |
| 包裝： | 帶卷 (TR) |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)當(dāng)前第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)
ADuC7032-8L
Rev. A | Page 68 of 120
IRQ
The IRQ is the exception signal to enter the IRQ mode of the
processor. It is used to service general-purpose interrupt
handling of internal and external events.
There are four 32-bit registers dedicated to IRQ.
IRQSIG
Reflects the status of the different IRQ sources. If a peripheral
generates an IRQ signal, the corresponding bit in the IRQSIG is
set; otherwise, it is cleared. The IRQSIG bits are cleared when the
interrupt in the particular peripheral is cleared. All IRQ sources
can be masked in the IRQEN MMR. IRQSIG is read only and can
be used to poll interrupt sources.
IRQEN
Provides the value of the current enable mask. When the bit is
set to 1, the source request is enabled to create an IRQ exception.
When the bit is set to 0, the source request is disabled or masked
and does not create an IRQ exception.
IRQCLR
A write-only register that allows clearing the IRQEN register to
mask an interrupt source. Each bit set to 1 clears the corresponding
bit in the IRQEN register without affecting the remaining bits.
The pair of registers, IRQEN and IRQCLR, allow independent
manipulation of the enable mask without requiring an auto-
matic read-modify-write.
IRQSTA
A read-only register that provides the current enabled IRQ source
status (effectively a Logic AND of the IRQSIG and IRQEN bits).
When the bit is set to 1, that source generates an active IRQ request
to the ARM7TDMI core. There is no priority encoder or interrupt
vector generation. This function is implemented in software in a
common interrupt handler routine. All 32 bits are logically OR’ed
to create a single IRQ signal to the ARM7TDMI core.
FIQ
The fast interrupt request (FIQ) is the exception signal to enter
the FIQ mode of the processor. It is provided to service data
transfer or communication channel tasks with low latency. The
FIQ interface is identical to the IRQ interface, providing the
second level interrupt (highest priority). Four 32-bit registers
are dedicated to FIQ, FIQSIG, FIQEN, FIQCLR, and FIQSTA.
Bit 31 to Bit 1 of FIQSTA are logically OR’ed to create the FIQ
signal to the core and to Bit 0 of both the FIQ and IRQ registers
(FIQ source).
The logic for FIQEN and FIQCLR does not allow an interrupt
source to be enabled in both IRQ and FIQ masks. A bit set to 1
in FIQEN, as a side effect, clears the same bit in IRQEN.
A bit set to 1 in IRQEN, as a side effect, clears the same bit in
FIQEN. An interrupt source can be disabled in both IRQEN
and FIQEN masks.
Programmed Interrupts
Because the programmed interrupts are nonmaskable, they are
controlled by another register, SWICFG, which writes into both
IRQSTA and IRQSIG registers and/or FIQSTA and FIQSIG
registers at the same time.
The 32-bit register dedicated to software interrupt is SWICFG,
described in Table 52. This MMR allows the control of
programmed source interrupt.
Table 52. SWICFG MMR Bit Designations
Bit
Description
31 to 3
Reserved.
2
Programmed Interrupt FIQ.
Setting/clearing this bit corresponds to
setting/clearing Bit 1 of FIQSTA and FIQSIG.
1
Programmed Interrupt IRQ.
Setting/clearing this bit corresponds to
setting/clearing Bit 1 of IRQSTA and IRQSIG.
0
Reserved.
Note that to be detected by the interrupt controller and to be
detected by the user in the IRQSTA and FIQSTA registers, any
interrupt signal must be active for at least the minimum
interrupt latency time.
IR
QS
TA
FIQS
T
A
IR
QS
IG
FI
Q
S
IG
TIMER0
TIMER1
TIMER2
TIMER3
LIN H/W
FLASH/EE
PLL LOCK
ADC
UART
SPI
XIRQ
IR
QE
N
FI
Q
E
N
TIMER0
TIMER1
TIMER2
TIMER3
LIN H/W
FLASH/EE
PLL LOCK
ADC
UART
SPI
XIRQ
IRQ
FIQ
0
598
6-
0
29
Figure 29. Interrupt Structure
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AT91R40008-66AU-999 | IC MCU 32BIT RISC 100LQFP |
| ADUC7024BSTZ62-RL | IC MCU 12BIT 1MSPS UART 64-LQFP |
| VE-B33-IW-F3 | CONVERTER MOD DC/DC 24V 100W |
| VE-B33-IW-F1 | CONVERTER MOD DC/DC 24V 100W |
| VE-B34-IX-F3 | CONVERTER MOD DC/DC 48V 75W |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADUC7032BSTZ-8L | 制造商:Analog Devices 功能描述:FLASH 96K ARM7 TRIPLE 16-BIT ADC LIN IC. - Trays |
| ADUC7032BSTZ-8L-RL | 制造商:Analog Devices 功能描述:FLASH 96K ARM7 TRIPLE 16-BIT ADC LIN IC. - Tape and Reel |
| ADUC7032BSTZ-8V | 制造商:Analog Devices 功能描述: 制造商:Rochester Electronics LLC 功能描述: |
| ADUC7032BSTZ-8V-RL | 功能描述:IC BATTERY SENSOR PREC 48-LQFP RoHS:是 類(lèi)別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:MicroConverter® ADuC7xxx 標(biāo)準(zhǔn)包裝:1,500 系列:AVR® ATtiny 核心處理器:AVR 芯體尺寸:8-位 速度:16MHz 連通性:I²C，LIN，SPI，UART/USART，USI 外圍設(shè)備:欠壓檢測(cè)/復(fù)位，POR，PWM，溫度傳感器，WDT 輸入/輸出數(shù):16 程序存儲(chǔ)器容量:8KB（4K x 16） 程序存儲(chǔ)器類(lèi)型:閃存 EEPROM 大小:512 x 8 RAM 容量:512 x 8 電壓 - 電源 (Vcc/Vdd):2.7 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 11x10b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 125°C 封裝/外殼:20-SOIC（0.295"，7.50mm 寬） 包裝:帶卷 (TR) |
| ADUC7033 | 制造商:AD 制造商全稱(chēng):Analog Devices 功能描述:Integrated Precision Battery Sensor For Automotive |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。