參數(shù)資料
型號(hào): ADUC7032BSTZ-88-RL
廠商: Analog Devices Inc
文件頁數(shù): 112/120頁
文件大?。?/td> 0K
描述: IC MCU 96K FLASH DUAL 48LQFP
標(biāo)準(zhǔn)包裝: 2,000
系列: MicroConverter® ADuC7xxx
核心處理器: ARM7
芯體尺寸: 16/32-位
速度: 20.48MHz
連通性: LIN,SPI,UART/USART
外圍設(shè)備: POR,PSM,溫度傳感器,WDT
輸入/輸出數(shù): 9
程序存儲(chǔ)器容量: 96KB(48K x 16)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 1.5K x 32
電壓 - 電源 (Vcc/Vdd): 3.5 V ~ 18 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 2x16b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 105°C
封裝/外殼: 48-LQFP
包裝: 帶卷 (TR)
ADuC7032-8L
Rev. A | Page 91 of 120
High Voltage Configuration 0 Register
Name:
HVCFG0
Address:
Indirectly addressed via the HVCON high voltage interface
Default Value:
0x00
Access:
Read/write
Function:
This 8-bit register controls the function of high voltage circuits on the ADuC7032-8L. This register is not an MMR and does
not appear in the MMR memory map. It is accessed via the HVCON registered interface. Data to be written to this register is loaded via
the HVDAT MMR and data is read back from this register via the HVDAT MMR.
Table 74. HVCFG0 Bit Designations
Bit
Description
7
WU Thermal Shutdown Disable.
1 = disable the automatic shutdown of the WU driver when a thermal event occurs.
0 = enable the automatic shutdown of the WU driver when a thermal event occurs.
6
Precision Oscillator Enable Bit.
1 = enable the precision 131 kHz oscillator. The oscillator start-up time is typically 70 μs (including high voltage interface latency
of 10 μs).
0 = power-down the precision 131 kHz oscillator.
5
Reserved. This bit is reserved and should be written as 0 by user code.
4
WU Assert Bit.
1 = assert the external WU pin high.
0 = pull the external WU pin low via an internal 10 kΩ pull-down resistor.
3
PSM Enable Bit.
0 = disable the power supply (voltage at the VDD pin) monitor.
1 = enable the power supply (voltage at the VDD pin) monitor. When IRQ3 (IRQEN[16]) is enabled, the PSM generates an
interrupt if the voltage at the VDD pin drops below 6.0 V.
2
Low Voltage Flag Enable Bit.
0 = disable the low voltage flag function.
1 = enable the low voltage flag function. The low voltage flag can be interrogated via HVMON[3] after power-up to determine if
the REG_DVDD voltage previously dropped below 2.1 V.
1 to 0
LIN Operating Mode.
These bits enable/disable the LIN driver.
00 = LIN disabled.
01 = reserved (not LIN 2.0 compliant).
10 = LIN enabled.
11 = reserved.
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