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| 型號(hào)： | ADUC7032BSTZ-88-RL |
| 廠(chǎng)商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 36/120頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC MCU 96K FLASH DUAL 48LQFP |
| 標(biāo)準(zhǔn)包裝： | 2,000 |
| 系列： | MicroConverter® ADuC7xxx |
| 核心處理器： | ARM7 |
| 芯體尺寸： | 16/32-位 |
| 速度： | 20.48MHz |
| 連通性： | LIN，SPI，UART/USART |
| 外圍設(shè)備： | POR，PSM，溫度傳感器，WDT |
| 輸入/輸出數(shù)： | 9 |
| 程序存儲(chǔ)器容量： | 96KB（48K x 16） |
| 程序存儲(chǔ)器類(lèi)型： | 閃存 |
| RAM 容量： | 1.5K x 32 |
| 電壓 - 電源 (Vcc/Vdd)： | 3.5 V ~ 18 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 2x16b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 105°C |
| 封裝/外殼： | 48-LQFP |
| 包裝： | 帶卷 (TR) |
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ADuC7032-8L
Rev. A | Page 22 of 120
Interrupt Latency
The worst-case latency for an FIQ consists of the following:
The longest time the request can take to pass through
the synchronizer
Plus the time for the longest instruction to complete
(the longest instruction is an LDM that loads all the registers,
including the PC)
Plus the time for the data abort entry
Plus the time for FIQ entry
At the end of this time, the ARM7TDMI executes the instruc-
tion at 0x1C (FIQ interrupt vector address). The maximum
total time is 50 processor cycles, or just over 2.44 μs in a system
using a continuous 20.48 MHz processor clock. The maximum
IRQ latency calculation is similar, but it must allow for the fact
that FIQ has higher priority and could delay entry into the IRQ
handling routine for an arbitrary length of time. This time can
be reduced to 42 cycles if the LDM command is not used; some
compilers have an option to compile without using this command.
Another option is to run the part in Thumb mode, where the time
is reduced to 22 cycles.
The minimum latency for FIQ or IRQ interrupts is five cycles.
It consists of the shortest time the request can take through the
synchronizer, plus the time to enter the exception mode.
Note that the ARM7TDMI initially (first instruction) runs in
ARM (32-bit) mode when an exception occurs. The user can
immediately switch from ARM mode to Thumb mode, if required
(for example, when executing interrupt service routines).
MEMORY ORGANIZATION
The ARM7 (a von Neumann architecture) MCU core sees memory
ADuC7032-8L maps this memory into four distinct user areas,
namely
A remappable memory area
An SRAM area
A Flash/EE area
A memory mapped register (MMR) area
The first 96 kB of this memory space is used as an area into
which the on-chip Flash/EE or SRAM can be remapped. A second
4 kB area at the top of the memory map is used to locate the
memory mapped registers (MMR), through which all on-chip
peripherals are configured and monitored. The remaining two
areas of memory are constituted as 6 kB of SRAM and 96 kB of
on-chip Flash/EE memory. There are 94 kB of on-chip Flash/EE
memory available to the user, and the remaining 2 kB are reserved
for the on-chip kernel. These areas are described in more detail
in the sections that follow.
Any access, either read or write, to an area not defined in the
memory map results in a data abort exception.
0x00417FF
0x00040000
0xFFFF0FFF
0xFFFF0000
MMRs
0x00097FFF
0x00080000
FLASH/EE
SRAM
0x0017FFF
0x00000000
REMAPPABLE MEMORY SPACE
(FLASH/EE OR SRAM)
RESERVED
0
59
86
-01
1
Figure 10. ADuC7032-8L Memory Map
Memory Format
The ADuC7032-8L memory organization is configured in little
endian format: the least significant byte is located in the lowest
byte address, and the most significant byte is located in the
highest byte address.
BIT 31
BYTE 2
A
6
2
.
BYTE 3
B
7
3
.
BYTE 1
9
5
1
.
BYTE 0
8
4
0
.
BIT 0
32 BITS
0xFFFFFFFF
0x00000004
0x00000000
0
598
6-
0
10
Figure 11. Little Endian Format
SRAM
The ADuC7032-8L features 6 kB of SRAM available to the user,
organized as 1536 bits × 32 bits, that is, 1536 words, that are
located at 0x00040000. RAM space can be used as data memory
and as a volatile program space.
ARM code can run directly from SRAM at full clock speed,
given that the SRAM array is configured as a 32-bit wide
memory array.
SRAM is read/write in 8-, 16-, and 32-bit segments.
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| ADUC7032BSTZ-8L | 制造商:Analog Devices 功能描述:FLASH 96K ARM7 TRIPLE 16-BIT ADC LIN IC. - Trays |
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| ADUC7032BSTZ-8V-RL | 功能描述:IC BATTERY SENSOR PREC 48-LQFP RoHS:是 類(lèi)別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:MicroConverter® ADuC7xxx 標(biāo)準(zhǔn)包裝:1,500 系列:AVR® ATtiny 核心處理器:AVR 芯體尺寸:8-位 速度:16MHz 連通性:I²C，LIN，SPI，UART/USART，USI 外圍設(shè)備:欠壓檢測(cè)/復(fù)位，POR，PWM，溫度傳感器，WDT 輸入/輸出數(shù):16 程序存儲(chǔ)器容量:8KB（4K x 16） 程序存儲(chǔ)器類(lèi)型:閃存 EEPROM 大小:512 x 8 RAM 容量:512 x 8 電壓 - 電源 (Vcc/Vdd):2.7 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 11x10b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 125°C 封裝/外殼:20-SOIC（0.295"，7.50mm 寬） 包裝:帶卷 (TR) |
| ADUC7033 | 制造商:AD 制造商全稱(chēng):Analog Devices 功能描述:Integrated Precision Battery Sensor For Automotive |
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