參數(shù)資料
型號: ADUC7032BSTZ-88-RL
廠商: Analog Devices Inc
文件頁數(shù): 102/120頁
文件大?。?/td> 0K
描述: IC MCU 96K FLASH DUAL 48LQFP
標準包裝: 2,000
系列: MicroConverter® ADuC7xxx
核心處理器: ARM7
芯體尺寸: 16/32-位
速度: 20.48MHz
連通性: LIN,SPI,UART/USART
外圍設備: POR,PSM,溫度傳感器,WDT
輸入/輸出數(shù): 9
程序存儲器容量: 96KB(48K x 16)
程序存儲器類型: 閃存
RAM 容量: 1.5K x 32
電壓 - 電源 (Vcc/Vdd): 3.5 V ~ 18 V
數(shù)據(jù)轉換器: A/D 2x16b
振蕩器型: 內部
工作溫度: -40°C ~ 105°C
封裝/外殼: 48-LQFP
包裝: 帶卷 (TR)
ADuC7032-8L
Rev. A | Page 82 of 120
GPIO Port1 Control Register
Name:
GP1CON
Address:
0xFFFF0D04
Default Value:
0x10000000
Access:
Read/write
Function:
This 32-bit MMR selects the pin function for each Port1 pin.
Table 60. GP1CON MMR Bit Designations
Bit
Description
31 to 5
Reserved. These bits are reserved and should be written as 0 by user code.
4
GPIO_6 Function Select Bit.
Cleared to 0 by user code to configure the GPIO_6 pin as a general-purpose I/O (GPIO) pin.
Set to 1 by user code to configure the GPIO_6 pin as TxD, transmit data for UART serial port.
3 to 1
Reserved. These bits are reserved and should be written as 0 by user code.
0
GPIO_5 Function Select Bit.
Cleared to 0 by user code to configure the GPIO_5 pin as a general-purpose I/O (GPIO) pin.
Set to 1 by user code to configure the GPIO_5 pin as RxD, receive data for UART serial port.
GPIO Port2 Control Register
Name:
GP2CON
Address:
0xFFFF0D08
Default Value:
0x01000000
Access:
Read/write
Function:
This 32-bit MMR selects the pin function for each Port2 pin.
Table 61. GP2CON MMR Bit Designations
Bit
Description
31 to 21
Reserved. These bits are reserved and should be written as 0 by user code.
20
GPIO_12 Function Select Bit.
Cleared to 0 by user code to route the LIN transmit data to an internal general-purpose I/O (GPIO_12) pad that can then be
written via the GP2DAT MMR.
Set to 1 by user code to route the UART TxD (transmit data) to the LIN data pin. This configuration is used in LIN mode.
19 to 17
Reserved. These bits are reserved and should be written as 0 by user code.
16
GPIO_11 Function Select Bit.
Cleared to 0 by user code to internally disable the LIN input data path. In this configuration, GPIO_11 is used to support
diagnostic readback on all external high voltage I/O pins (see HVCFG1[2:0]).
Set to 1 by user code to route input data from the LIN interface to both the LIN hardware timing/synchronization logic and to
the UART RxD (receive data). This mode must be configured by user code when using LIN.
15 to 5
Reserved. These bits are reserved and should be written as 0 by user code.
4
GPIO_8 Function Select Bit.
Cleared to 0 by user code to internally disable the LIN input data path. In this configuration, GPIO_11 is used to support
diagnostic readback on all external high voltage I/O pins (see HVCFG1[2:0]).
Set to 1 by user code to route input data from the LIN interface to both the LIN hardware timing/synchronization logic and
the UART RxD (receive data). This mode must be configured by user code when using LIN.
3 to 1
Reserved. These bits are reserved and should be written as 0 by user code.
0
GPIO_7 Function Select Bit.
Cleared to 0 by user code to configure the GPIO_7 pin as a general-purpose I/O (GPIO) pin.
Set to 1 by user code to route data driven into the GPIO_7 pin through the on-chip LIN transceiver to be output at the LIN
pin. This mode can be used to drive the LIN transceiver interface as a standalone component without any interaction from
MCU or UART.
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