參數(shù)資料
型號： ADUC7032BSTZ-88-RL
廠商： Analog Devices Inc
文件頁數(shù)： 117/120頁
文件大?。?/td> 0K
描述： IC MCU 96K FLASH DUAL 48LQFP
標準包裝： 2,000
系列： MicroConverter® ADuC7xxx
核心處理器： ARM7
芯體尺寸： 16/32-位
速度： 20.48MHz
連通性： LIN，SPI，UART/USART
外圍設(shè)備： POR，PSM，溫度傳感器，WDT
輸入/輸出數(shù)： 9
程序存儲器容量： 96KB（48K x 16）
程序存儲器類型： 閃存
RAM 容量： 1.5K x 32
電壓 - 電源 (Vcc/Vdd)： 3.5 V ~ 18 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 2x16b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 105°C
封裝/外殼： 48-LQFP
包裝： 帶卷 (TR)
ADuC7032-8L
Rev. A | Page 96 of 120
HANDLING INTERRUPTS FROM THE HIGH
VOLTAGE PERIPHERAL CONTROL INTERFACE
An interrupt controller is also integrated with the high voltage
circuits. If enabled via IRQEN[16], one of five high voltage
sources can assert the high voltage interrupt (IRQ3) signal and
interrupt the MCU core.
While the MCU response to this interrupt event is, as normal, to
vector to the IRQ or FIQ interrupt vector address, the high voltage
interrupt controller simultaneously and automatically loads the
current value of the high voltage status register (HVSTA) into the
HVDAT register. During this time the busy bit, HVCON[0], is set
to indicate the transfer is in progress and clears after 10 μs to
indicate the HVSTA contents are available in HVDAT.
The interrupt handler can, therefore, poll the busy bit in HVCON
until it deasserts and then read the HVDAT register.
At this time, HVDAT holds the value of the HVSTA register.
The status flags can then be interrogated to determine the exact
source of the high voltage interrupt and take appropriate action.
LOW VOLTAGE FLAG (LVF)
The ADuC7032-8L features a low voltage flag (LVF) that, when
enabled, allows the user to monitor REG_DVDD. When
enabled via HVCFG0[2], the low voltage flag can be monitored
through HVMON[3]. If REG_DVDD drops below 2.1 V,
HVMON[3] is cleared. If REG_DVDD drops below 2.1 V,
the RAM contents are corrupted. Once the low voltage flag is
enabled, it is reset only by REG_DVDD dropping below 2.1 V
or the disabling of the LVF functionality using HVCFG0[2].
HIGH VOLTAGE DIAGNOSTICS
It is possible to diagnose fault conditions on the WU and LIN
bus, as detailed in Table 78.
Table 78. High Voltage Diagnostics
High Voltage Pin
Fault Condition
Method
Result
LIN
Short between
LIN and VBAT
Drive LIN low
LIN short-circuit interrupt is generated after 20 μs
if more than 100 mA is drawn continuously.
Short between
LIN and GND
Drive LIN high
LIN readback low.
WU
Short between
WU and VBAT
Drive WU low
Readback high.
Short between
WU and GND
Drive WU high
WU short-circuit interrupt is generated after 400 μs if more
than 200 mA is sourced.
Open circuit
Enable OC diagnostic resistor with
WU disabled
HVMON[7] is cleared if load is connected; HVMON[7] is set
if WU is open-circuited.
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