參數(shù)資料
型號： ADUC7032BSTZ-88-RL
廠商： Analog Devices Inc
文件頁數(shù)： 61/120頁
文件大小： 0K
描述： IC MCU 96K FLASH DUAL 48LQFP
標(biāo)準(zhǔn)包裝： 2,000
系列： MicroConverter® ADuC7xxx
核心處理器： ARM7
芯體尺寸： 16/32-位
速度： 20.48MHz
連通性： LIN，SPI，UART/USART
外圍設(shè)備： POR，PSM，溫度傳感器，WDT
輸入/輸出數(shù)： 9
程序存儲器容量： 96KB（48K x 16）
程序存儲器類型： 閃存
RAM 容量： 1.5K x 32
電壓 - 電源 (Vcc/Vdd)： 3.5 V ~ 18 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 2x16b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 105°C
封裝/外殼： 48-LQFP
包裝： 帶卷 (TR)
ADuC7032-8L
Rev. A | Page 45 of 120
ADC Mode Register
Name:
ADCMDE
Address:
0xFFFF0508
Default Value:
0x00
Access:
Read/write
Function:
The ADC Mode MMR is an 8-bit register that configures the mode of operation of the ADC subsystem.
Table 36. ADCMDE MMR Bit Designations
Bit
Description
7
Not Used. This bit is reserved for future functionality and must be written as 0 by user code.
6
20 kΩ Resistor Select.
Set to 1 to select the 20 kΩ resistor, as shown in Figure 18.
Set to 0 to select the direct path to ground, as shown in Figure 18 (default).
5
Low Power Mode Reference Select.
Set to 1 to enable the precision voltage reference in ADC low power mode. This increases current consumption.
Set to 0 to enable the low power voltage reference in ADC low power mode (default).
4 to 3
ADC Power Mode Configuration.
00 = ADC normal mode. If enabled, the ADC operates with normal current consumption yielding optimum electrical
performance.
01 = ADC low power mode. If enabled, the I-ADC operates with reduced current consumption. This limitation in current
consumption is achieved (at the expense of ADC noise performance) by fixing the gain to 128 and using the on-chip low power
(131 kHz) oscillator to drive the ADC circuits directly.
10 = ADC low power plus mode. If enabled, the I-ADC again operates with reduced current consumption. In this mode, the gain
is fixed to 512, and the current consumed is 200 μA (approximately) more than ADC low power mode, shown previously. The
additional current consumed also ensures ADC noise performance is better than that achieved in ADC low power mode.
11 = not defined.
2 to 0
ADC Operation Mode Configuration.
000 = ADC power-down mode. All ADC circuits (including internal reference) are powered-down.
001 = ADC continuous conversion mode. In this mode, any enabled ADC continuously converts.
010 = ADC single conversion mode. In this mode, any enabled ADC performs a single conversion. The ADC enters idle mode once the
single-shot conversion is complete. A single conversion takes two to three ADC clock cycles, depending on the chop mode.
011 = ADC idle mode. In this mode, the ADC is fully powered on but is held in r.
100 = ADC self-offset calibration. In this mode, an offset calibration is performed on any enabled ADC using an internally
generated 0 V. The calibration is carried out at the user-programmed ADC settings; therefore, as with a normal single ADC
conversion, it takes two to three ADC conversion cycles before a fully settled calibration result is ready. The calibration result is
automatically written to the ADCxOF MMR of the respective ADC. The ADC returns to idle mode and the calibration- and
conversion-ready status bits are set at the end of an offset calibration cycle.
101 = ADC self-gain calibration. In this mode, a gain calibration against an internal reference voltage is performed on all
enabled ADCs. A gain calibration is a two-stage process that takes twice the time of an offset calibration. The calibration result is
automatically written to the ADCxGN MMR of the respective ADC. The ADC returns to idle mode, and the calibration- and
conversion-ready status bits are set at the end of a gain-calibration cycle. An ADC self-gain calibration should only be carried
out on the current channel ADC, while preprogrammed, factory calibration coefficients (downloaded automatically from internal
Flash) should be used for voltage temperature measurements. If an external NTC is used, an ADC self-calibration should be done
on the temperature channel.
110 = ADC system zero-scale calibration. In this mode, a zero-scale calibration is performed on enabled ADC channels against an
external zero-scale voltage driven at the ADC input pins. The calibration is carried out at the user programmed ADC settings;
therefore, as with a normal single ADC conversion, it takes three ADC conversion cycles before a fully settled calibration result is ready.
111 = ADC system full-scale calibration.
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