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STANDARD PRODUCT
PMC-Sierra, Inc.
PM6344 EQUAD
PMC-951013
ISSUE 5
QUADRUPLE E1 FRAMER
199
output low. The FIFO buffer is not cleared when an abort is detected. All bytes
received up to the abort are available to be read.
After an abort, the RFDL state machine will be in the receiving all ones state,
and the data link status will be idle. When the first flag is detected, a new
interrupt will be generated, with a dummy data byte loaded into the FIFO buffer,
to indicate that the data link is now active.
Figure 25
- RFDL FIFO Overrun
Serial Data
extracted from
ESF FDL
RDLINT[x]
RDLEOM[x]
D[7:0]
Flag
D1
D2
D3
Dn
R C1
C2
Flag
D1
B1
B2 B3
D1
STATUSRD
OVR
D2
Dn-1
R Abort
This diagram shows the relationship between RFDL inputs and outputs for the
case where interrupts are programmed to occur when two data bytes are present
in the FIFO buffer. Each read is composed of two register reads, as described
above. In this example, data is not read by the end of B2. An overrun occurs
since unread data (Dn-3) has been overwritten by B1. This sets the RDLEOM[x]
output high, and resets both the RFDL and the FIFO buffer. The RFDL is held
disabled until the RFDL Status Register is read. The start flag sequence is not
detected since the RFDL is still held disabled when it occurs. Consequently, the
RFDL will ignore the entire frame including the abort sequence (since it has not
occurred in a valid frame or during flag reception, according to the RFDL).