參數(shù)資料
型號(hào)： NS32FX164V-25
廠商： NATIONAL SEMICONDUCTOR CORP
元件分類： 數(shù)字信號(hào)處理
英文描述： Advanced Imaging/Communication Signal Processors
中文描述： 16-BIT, 50 MHz, MIXED DSP, PQCC68
封裝： PLASTIC, LCC-68
文件頁(yè)數(shù)： 56/102頁(yè)
文件大小： 1053K
代理商： NS32FX164V-25
3.0 Functional Description
(Continued)
For optimal noise immunity, the power and ground pins
should be connected to V
CC
and ground planes respective-
ly. If V
CC
and ground planes are not used, single conductors
should be run directly from each V
CC
pin to a power point,
and from each GND pin to a ground point. Daisy-chained
connections should be avoided.
Decoupling capacitors should also be used to keep the
noise level to a minimum. Standard 0.1
m
F ceramic capaci-
tors can be used for this purpose. They should attach to
V
CC
, GND pins as close as possible to the NS32FX164.
During prototype using wire-wrap or similar methods, the
capacitors should be soldered directly to the power pins of
the NS32FX164 socket, or as close as possible, with very
short leads.
Design Notes
When constructing a board using high frequency clocks with
multiple lines switching, special care should be taken to
avoid resonances on signal lines. A separate power and
ground layer is recommended. This is true when designing
boards for the NS32FX164. Switching times of under 5 ns
on some lines are possible. Resonant frequencies should
be maintained well above the 200 MHz frequency range on
signal paths by keeping traces short and inductance low.
Loading capacitance at the end of a transmission line con-
tributes to the resonant frequency and should be minimized
if possible. Capacitors should be located as close as
possible across each power and ground pair near the
NS32FX164.
Power and ground connections are shown in Figure 3-14.
TL/EE/11267–26
FIGURE 3-14. Power and Ground Connections
3.5.2 Clocking
The NS32FX164 provides an internal oscillator that inter-
acts with an external clock source through two signals;
OSCIN and OSCOUT.
Either an external single-phase clock signal or a crystal can
be used as the clock source. If a single-phase clock source
is used, only the connection on OSCIN is required; OSC-
OUT should be left unconnected or loaded with no more
than 5 pF of stray capacitance. The voltage level require-
ments specified in Section 4.3 must also be met for proper
operation.
When operation with a crystal is desired, special care
should be taken to minimize stray capacitances and induc-
tances. The crystal, as well as the external components,
should be placed in close proximity to the OSCIN and OSC-
OUT pins to keep the printed circuit trace lengths to an
absolute minimum.Figures 3-15 and3-16 show the external
crystal interconnections. Table 3-3 provides the crystal
characteristics and the values of the R, C, and L compo-
nents, including stray capacitance, required for various fre-
quencies.
TL/EE/11267–27
FIGURE 3-15. Crystal InterconnectionsD30 MHz
TL/EE/11267–28
FIGURE 3-16. Crystal InterconnectionsD
40 MHz, 50 MHz
TL/EE/11267–29
FIGURE 3-17. Recommended Reset Connections
56
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