參數(shù)資料
型號： NS32FX164V-25
廠商： NATIONAL SEMICONDUCTOR CORP
元件分類： 數(shù)字信號處理
英文描述： Advanced Imaging/Communication Signal Processors
中文描述： 16-BIT, 50 MHz, MIXED DSP, PQCC68
封裝： PLASTIC, LCC-68
文件頁數(shù)： 54/102頁
文件大?。?/td> 1053K
代理商： NS32FX164V-25
3.0 Functional Description
(Continued)
Syntax:
EXEC VCPOLY
15
11 10
0
10000
101 0001 1000
Operation:
à
complex X,Z;
real Y;
complex temp;
temp.re
4
(real) Y
[
0
]
* X
[
0
]
.re;
temp.im
4
0;
for (n
4
0; n
k
LENG; n
00
)
à
Z
[
n
] 4
(complex) Z
[
n
]
* X
[
n
0
1
] 0
temp;
ó
Z
[
LENG
]
.re
4
(real) (Z
[
LENG
]
.re *
X
[
LENG
0
1
]
.re
0
Y
[
0
]
* temp.re);
Y.ADDR
4
&Y
[
1
]
;
ó
Note:
The LENG parameter for this operation must be greater than 1.
VDECIDEDVector Nearest Neighbor Decision Logic
The VDECIDE instruction is used to implement nearest
neighbor decision in Quadrature Amplitude Modulation
(QAM) modem applications. The input is the X complex vec-
tor. The output is placed in the Z integer vector, which can
be used as an index vector to extract information from look-
up tables. The indicated constant values are taken from the
Y vector.
Syntax:
EXEC VDECIDE
15
11 10
0
10000
100 1111 0000
Operation:
à
complex X;
aligned real Y;
real Z;
internal register complex temp;
for (n
4
0; n
k
LENG; n
00
)
à
temp.re
4
min (X
[
n
]
.re, Y
[
0
]
.low);
temp.im
4
min (X
[
n
]
.im, Y
[
0
]
.high);
temp.re
4
max (temp.re, Y
[
1
]
.low);
temp.im
4
max (temp.im, Y
[
1
]
.high);
X
[
n
] 4
temp;
Z
[
n
] 4
(real) ((temp.re * Y
[
2
]
.low) &
(extended) Y
[
3
]
.low)
l
((temp.im * Y
[
2
]
.high) & (extended)
Y
[
3
]
.high) ;
ó
ó
Note:
Y.INCR must be specified as 1, and Y.WRAP must be specified as 3.
VDISTDVector Euclidean Distance
The VDIST instruction calculates the square of the Euclide-
an distance between corresponding elements of the X and
Y complex vectors, and places the result in the Z real vec-
tor.
Syntax:
EXEC VDIST
15
11 10
0
10000
100 1111 1110
Operation:
à
complex X,Y;
real Z;
for (n
4
0; n
k
LENG; n
00
)
à
Z
[
n
] 4
(real) (X
[
n
]
.re
1
Y
[
n
]
.re)** 2
a
(X
[
n
]
.im
1
Y
[
n
]
.im) **2
ó
ó
VFFTDVector Fast Fourier Transform
;
The VFFT instruction implements one pass of in-place FFT
vector update, according to the radix-2 FFT method.
Syntax:
EXEC VFFT
15
11 10
0
10000
101 0000 0110
Operation:
à
complex X,Y,Z;
complex temp;
for (n
4
0; n
k
LENG; n
00
)
à
temp
4
(complex) (Z
[
n
] 0
X
[
n
]
* Y
[
n
]
);
Y
[
n
] 4
(complex) (Z
[
n
] 1
X
[
n
]
* Y
[
n
]
);
Z
[
n
] 4
temp
ó
ó
VESIIRDVector Extended Single-Pole IIR
This instruction is not supported by the NS32FX161.
The VESIIR instruction performs a special form of an Infi-
nite-Impulse Response (IIR) filter. The samples and coeffi-
cient are given as real values, as well as the output result.
However, the accumulation is performed using extended-
precision arithmetic.
Syntax:
EXEC VESIIR
15
11 10
0
10000
101 0011 0111
54
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