參數(shù)資料
型號: NS32FX164V-25
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 數(shù)字信號處理
英文描述: Advanced Imaging/Communication Signal Processors
中文描述: 16-BIT, 50 MHz, MIXED DSP, PQCC68
封裝: PLASTIC, LCC-68
文件頁數(shù): 13/102頁
文件大?。?/td> 1053K
代理商: NS32FX164V-25
2.0 Architectural Description
(Continued)
Following Index Bytes come any displacements (addressing
constants) or immediate values associated with the select-
ed addressing modes. Each Disp/lmm field may contain
one of two displacements, or one immediate value. The size
of a Displacement field is encoded within the top bits of that
field, as shown in Figure 2-19, with the remaining bits inter-
preted as a signed (two’s complement) value. The size of an
immediate value is determined from the Opcode field. Both
Displacement and Immediate fields are stored most-signifi-
cant byte first. Note that this is different from the memory
representation of data (Section 2.2).
Some instructions require additional ‘‘implied’’ immediates
and/or displacements, apart from those associated with ad-
dressing modes. Any such extensions appear at the end of
the instruction, in the order that they appear within the list of
operands in the instruction definition (Section 2.4.3).
TL/EE/11267–3
FIGURE 2-18. Index Byte Format
TL/EE/11267–2
Note:
Dashed lines indicate information copied to register during transfer of control between modules.
FIGURE 2-16. NS32FX164 Run-Time Environment
TL/EE/11267–4
FIGURE 2-17. General Instruction Format
13
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