參數(shù)資料
型號： NS32FX164V-25
廠商： NATIONAL SEMICONDUCTOR CORP
元件分類： 數(shù)字信號處理
英文描述： Advanced Imaging/Communication Signal Processors
中文描述： 16-BIT, 50 MHz, MIXED DSP, PQCC68
封裝： PLASTIC, LCC-68
文件頁數(shù)： 19/102頁
文件大?。?/td> 1053K
代理商： NS32FX164V-25
2.0 Architectural Description
(Continued)
TABLE 2-2. NS32FX164 Instruction Set Summary
(Continued)
FLOATING POINT
Format
11
Operation
MOVf
MOVLF
MOVFL
MOVif
ROUNDfi
TRUNCfi
FLOORfi
ADDf
SUBf
MULf
DIVf
CMPf
NEGf
ABSf
LFSR
SFSR
POLYf
DOTf
SCALBf
LOGBf
Operands
gen,gen
gen,gen
gen,gen
gen,gen
gen,gen
gen,gen
gen,gen
gen,gen
gen,gen
gen,gen
gen,gen
gen,gen
gen,gen
gen,gen
gen
gen
gen,gen
gen,gen
gen,gen
gen,gen
Description
Move a floating point value.
Move and shorten a long value to standard.
Move and lengthen a standard value to long.
Convert any integer to standard or long floating.
Convert to integer by rounding.
Convert to integer by truncating, toward zero.
Convert to largest integer less than or equal to value.
Add.
Subtract.
Multiply.
Divide.
Compare.
Negate.
Take absolute value.
Load FSR.
Store FSR.
Polynomial Step.
Dot Product.
Binary Scale.
Binary Log.
9
9
9
9
9
9
11
11
11
11
11
11
11
9
9
12
12
12
12
MISCELLANEOUS
Format
Operation
Operands
Description
1
1
1
NOP
WAIT
DIA
No operation.
Wait for interrupt.
Diagnose. Single-byte ‘‘Branch to Self’’ for hardware
breakpointing. Not for use in programming.
GRAPHICS
Format
Operation
Operands
options
*
options
Description
5
5
5
5
5
5
5
5
5
5
5
BBOR
BBAND
BBFOR
BBXOR
BBSTOD
BITWT
EXTBLT
MOVMPi
TBITS
SBITS
SBITPS
Bit-aligned block transfer ‘OR’.
Bit-aligned block transfer ‘AND’.
Bit-aligned block transfer fast ‘OR’.
Bit-aligned block transfer ‘XOR’.
Bit-aligned block source to destination.
Bit-aligned word transfer.
External bit-aligned block transfer.
Move multiple pattern.
Test bit string.
Set bit string.
Set bit perpendicular string.
options
options
options
options
BITS
Format
Operation
Operands
Description
4
6
6
6
6
6
8
TBITi
SBITi
SBITIi
CBITi
CBITIi
IBITi
FFSi
gen,gen
gen,gen
gen,gen
gen,gen
gen,gen
gen,gen
gen,gen
Test bit.
Test and set bit.
Test and set bit, interlocked.
Test and clear bit.
Test and clear bit, interlocked.
Test and invert bit.
Find first set bit.
*
Note:
Options are controlled by fields of the instruction, PSR status bits, or dedicated register values.
19
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