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參數(shù)資料
| 型號： | NS32FX164V-25 |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | Advanced Imaging/Communication Signal Processors |
| 中文描述： | 16-BIT, 50 MHz, MIXED DSP, PQCC68 |
| 封裝： | PLASTIC, LCC-68 |
| 文件頁數(shù)： | 14/102頁 |
| 文件大?。?/td> | 1053K |
| 代理商： | NS32FX164V-25 |
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2.0 Architectural Description
(Continued)
2.4.2 Addressing Modes
The NS32FX164 CPU generally accesses an operand by
calculating its Effective Address based on information avail-
able when the operand is to be accessed. The method to be
used in performing this calculation is specified by the pro-
grammer as an ‘‘a(chǎn)ddressing mode’’.
Addressing modes in the NS32FX164 are designed to opti-
mally support high-level language accesses to variables. In
nearly all cases, a variable access requires only one ad-
dressing mode, within the instruction that acts upon that
variable. Extraneous data movement is therefore minimized.
NS32FX164 Addressing Modes fall into nine basic types:
Register:
The operand is available in one of the eight Gen-
eral Purpose Registers. In certain Slave Processor instruc-
tions, an auxiliary set of eight registers may be referenced
instead.
Register Relative:
A General Purpose Register contains an
address to which is added a displacement value from the
instruction, yielding the Effective Address of the operand in
memory.
Memory Space:
Identical to Register Relative above, ex-
cept that the register used is one of the dedicated registers
PC, SP, SB or FP. These registers point to data areas gen-
erally needed by high-level languages.
Memory Relative:
A pointer variable is found within the
memory space pointed to by the SP, SB or FP register. A
displacement is added to that pointer to generate the Effec-
tive Address of the operand.
Immediate:
The operand is encoded within the instruction.
This addressing mode is not allowed if the operand is to be
written.
Absolute:
The address of the operand is specified by a
displacement field in the instruction.
External:
A pointer value is read from a specified entry of
the current Link Table. To this pointer value is added a dis-
placement, yielding the Effective Address of the operand.
Top of Stack:
The currently-selected Stack Pointer (SP0 or
SP1) specifies the location of the operand. The operand is
pushed or popped, depending on whether it is written or
read.
Scaled Index:
Although encoded as an addressing mode,
Scaled Indexing is an option on any addressing mode ex-
cept Immediate or another Scaled Index. It has the effect of
calculating an Effective Address, then multiplying any Gen-
eral Purpose Register by 1, 2, 4 or 8 and adding into the
total, yielding the final Effective Address of the operand.
Table 2-1 is a brief summary of the addressing modes. For a
complete description of their actions, see the Series 32000
Instruction Set Reference Manual.
In addition to the general modes, Register-Indirect with
auto-increment/decrement and warps or pitch are available
on several of the graphics instructions.
Byte Displacement: Range
b
64 to
a
63
Word Displacement: Range
b
8192 to
a
8191
Double Word Displacement:
Range (Entire Addressing Space)
TL/EE/11267–5
FIGURE 2-19. Displacement Encodings
14
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| NS32FX200VF-25 | 制造商:Texas Instruments 功能描述: |
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