MPC823 Instruction Set—eieio
MOTOROLA
MPC823 USER’S MANUAL
B-57
INSTRUCTION
SET
B
eieio
Definition
Enforce In-Order Execution of I/O
Description
The eieio instruction provides an ordering function for the effects
of load and store instructions executed by a processor. These
loads and stores are divided into two sets, which are ordered
separately. The memory accesses caused by a dcbz instruction
are ordered like a store. The two sets are as follows:
Loads and stores to memory that are caching-inhibited,
guarded, and stores to memory that is write-through
required. The eieio instruction controls the order in which the
accesses are performed in main memory. It ensures that all
applicable memory accesses caused by instructions
preceding the eieio instruction have completed with respect
to main memory before any applicable memory accesses
caused by instructions following the eieio instruction access
main memory. It acts as a barrier that flows through the
memory queues to main memory, preventing the reordering
of memory accesses across the barrier. No ordering is
performed for dcbz if the instruction causes the system
alignment error handler to be invoked. All accesses in this set
are ordered as a single set—that is, there is not one order for
loads and stores to caching-inhibited and guarded memory
and another order for stores to write-through required
memory.
Stores to memory that have all of the following attributes—
caching-allowed, write-through not required, and memory-
coherency required. The eieio instruction controls the order
in which the accesses are performed with respect to
coherent memory. It ensures that all applicable stores
caused by instructions preceding the eieio instruction have
completed with respect to coherent memory before any
applicable stores caused by instructions following the eieio
instruction complete with respect to coherent memory. With
the exception of dcbz, eieio does not affect the order of
cache operations (whether caused explicitly by execution of
BIT
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
FIELD
31
00000
BIT
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
FIELD
00000
854
0