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Development Capabilities and Interface
MOTOROLA
MPC823 USER’S MANUAL
20-11
DEVELOPMENT
20
CAPABILITIES
&
INTERFACE
The instruction watchpoints and load/store match events on the address/data comparators
enter the load/store AND-OR logic where the load/store watchpoints and breakpoint are
generated. When aserted, the load/store watchpoints can generate the load/store
breakpoint or decrement one of the counters. When a counter on one of the load/store
watchpoints expires, the load/store breakpoint is asserted.
Watchpoints progress in the machine and are reported when they retire. Internal
breakpoints progress in the machine until they reach the top of the history buffer when the
machine branches to the breakpoint exception routine. So the breakpoint features can be
used without restricting the software, the address of the load/store cycle that generated the
load/store breakpoint is not stored in the data address register (DAR). In a load/store
breakpoint, the address of the load/store cycle that generated the breakpoint is stored in the
breakpoint address register (BAR). There are many types of internal watchpoints and
breakpoints:
Four I-Address Comparators Supporting Equal, Not Equal, Greater Than, and Less
Than.
Two L-Address Comparators Supporting Equal, Not Equal, Greater Than, and Less
Than.
Two L-Data Comparators Supporting Equal, Not Equal, Greater Than, and Less Than.
No Internal Breakpoint or Watchpoint Support for Unaligned Words and Half-Words.
The L-Data Comparators Can Be Programmed to Treat Fixed-Point Numbers as
Signed or Unsigned Values.
Combined Comparator Pairs to Detect In and Out of Range Conditions, Including Either
Signed or Unsigned Values On the L-Data.
A Programmable AND-OR Logic Structure Between the Four Instruction Comparators
Results in Five Outputs, Four Instruction Watchpoints, and One Instruction Breakpoint.
A Programmable AND-OR Logic Structure Between the Four Instruction Watchpoints
and the Four Load/Store Comparators Results in Three Outputs, Two Load/Store
Watchpoints, and One Load/Store Breakpoint.
Five Watchpoint Pins, Three For the Instruction and Two For the Load/Store.
Two Dedicated 16-Bit Down Counters. Each Can Be Programmed to Count Either an
Instruction Watchpoint or a Load/Store Watchpoint. Only Architecturally Executed
Events are Counted.
On-The-Fly Trap Enable Programming of the Different Internal Breakpoints Using the
Serial Interface of the Development Port. Software Control Is Also Available.
Watchpoints Do Not Change the Timing of the Machine.
Internal Breakpoints and Watchpoints Are Detected on the Instruction During
Instruction Fetch.
Internal Breakpoints and Watchpoints Are Detected on the Load/Store During Load/
Store Bus Cycles.
Instruction and Load/Store Breakpoints and Watchpoints Are Handled on Retirement
and Then Reported.