
Communication Processor Module
MOTOROLA
MPC823 USER’S MANUAL
16-19
RISC
COMMUNICATION
16
PROCESSOR
MODULE
16.2.7.4 THE RISC TIMER TABLES. The RISC microcontroller can have a maximum of 16
timers that are separate and distinct from the four general-purpose timers and baud rate
generators of the communication processor module. These timers are ideal for protocols
that do not require extreme precision, but do need to free the host CPU from scanning the
software’s timer tables. These timers are clocked from an internal timer that only the
microcontroller can access. Each pair of timers can be configured as pulse width modulation
(PWM) channels. The output of the channel is driven on one of the port B pins and a
maximum of six PWM channels are supported. The following list summarizes the main
features of the RISC timer tables.
Supports a maximum of 16 timers
Supports a maximum of six PWM channels
Three timer modes—one-shot, restart, and PWM
Maskable interrupt on timer expiration
Programmable timer resolution as low as 41ms at 25MHz
Maximum timeout period of 172sec at 25MHz
Continuously updated reference counter
RISC timer table operations are based on a “tick” in the RISC internal timer that is
programmed in the RISC controller configuration register (RCCR). The tick is a multiple of
1,024 general system clocks. The RISC timer tables have the lowest priority of all RISC
microcontroller operations, so if it is so busy with other tasks that it is unable to service the
timer during a tick interval, one or more of the timers might not be updated. This behavior
can be used to estimate the worst-case loading of the microcontroller. The timer tables are
configured in the RCCR, the timer table parameter RAM, the SET TIMER command that is
issued to the CPCR, the timer event register, and the timer mask register.
16.2.7.4.1 RISC Timer Table Parameter RAM Memory Map. Two areas of internal RAM
are used for the RISC timer tables—RISC timer table parameter RAM and the RISC timer
table entries—which are shown in
Figure 16-6. The RISC timer table parameter RAM area
begins at the RISC timer base address and is used for the general timer parameters. See
Note: All references to registers in the parameter RAM table are actually implemented
in the dual-port RAM area as a memory-based register.