- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄371773 > HC05V7GRS 68HC05V7 General Release Specification PDF資料下載
參數(shù)資料
| 型號： | HC05V7GRS |
| 英文描述： | 68HC05V7 General Release Specification |
| 中文描述： | 68HC05V7一般版本規(guī)范 |
| 文件頁數(shù)： | 49/170頁 |
| 文件大?。?/td> | 980K |
| 代理商： | HC05V7GRS |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁當(dāng)前第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁第145頁第146頁第147頁第148頁第149頁第150頁第151頁第152頁第153頁第154頁第155頁第156頁第157頁第158頁第159頁第160頁第161頁第162頁第163頁第164頁第165頁第166頁第167頁第168頁第169頁第170頁
SECTION 5: INTERRUPTS
MOTOROLA
Page 35
.
Figure 5-3: IRQ Status & Control Register
5.5.1.1
IRQA - IRQ Interrupt Acknowledge
The IRQA acknowledge bit clears an IRQ interrupt by clearing the IRQ, IRQPA and IRQPC
latches. This is achieved by writing a logic one to the IRQA acknowledge bit. Writing a logic
zero to the IRQA acknowledge bit will have no effect on the any of the IRQ latches. If either
the IRQ, IRQPA or IRQPC latch is not cleared within the IRQ service routine the CPU will
re-enter the IRQ interrupt sequence continuously until the IRQ latches are all cleared. The
IRQA is useful for cancelling unwanted or spurious interrupts which may have occurred
while servicing the initial IRQ interrupt. The IRQA acknowledge bit will always read as a
logic zero. The IRQA function is activated by reset.
NOTE:
The IRQ latch is cleared automatically during the IRQ vector fetch. The
IRQPA and IRQPC latches are not cleared automatically (to permit
interrupt source differentiation) and must be cleared from within the IRQ
service routine.
5.5.1.2
IRQPCF - Port C IRQ Interrupt Request
The IRQPCF flag bit indicates that a Port C IRQ request is pending. Writing to the IRQPCF
flag bit will have no effect on it. The IRQPCF flag bit must be cleared by writing a logic one
to the IRQA acknowledge bit. In this way an additional IRQPCF flag bit that is set while in
the service routine can be ignored by clearing the IRQPCF flag bit before exiting the service
routine. If the additional IRQPCF flag bit is not cleared in the IRQ service routine and the
IRQPCE enable bit remains set, the CPU will re-enter the IRQ interrupt sequence
continuously until either the IRQPCF flag bit or the IRQPCE enable bit is clear. This bit is
operational regardless of the state of the IRQPCE bit. The IRQPCF bit is cleared by reset.
5.5.1.3
IRQPAF - Port A IRQ Interrupt Request
The IRQPAF flag bit indicates that a Port A IRQ request is pending. Writing to the IRQPAF
flag bit will have no effect on it. The IRQPAF flag bit must be cleared by writing a logic one
to the IRQA acknowledge bit. In this way an additional IRQPAF flag bit that is set while in
the service routine can be ignored by clearing the IRQPAF flag bit before exiting the service
routine. If the additional IRQPAF flag bit is not cleared in the IRQ service routine and the
IRQPAE enable bit remains set, the CPU will re-enter the IRQ interrupt sequence
continuously until either the IRQPAF flag bit or the IRQPAE enable bit is clear. This bit is
operational regardless of the state of the IRQPAE bit. The IRQPAF bit is cleared by reset.
ICSR
$001F
1
7
W
R
0
0
0
0
0
0
0
reset
6
5
4
3
2
1
0
IRQE
IRQF
0
IRQA
0
IRQPAF
IRQPAE
IRQPCE
IRQPCF
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HC05 | Bipolar Transistor; Transistor Polarity:Dual P Channel; Power Dissipation:20W; DC Current Gain Min (hfe):25; Collector Current:1A; DC Current Gain Max (hfe):200; Power (Ptot):20W |
| HC1-5502A-7 | Subscriber Line Interface Circuit |
| HC4P-5502A-7 | Subscriber Line Interface Circuit |
| HC1062A | Low Voltage Telephone Speech Transmission Circuit / High/Low Level Mute |
| HC1198 | Peripheral IC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HC060WE1DS038B | 制造商:TE Connectivity 功能描述:EC7174-000 |
| HC060YW1DS038B | 制造商:TE Connectivity 功能描述:EC7207-000 |
| HC06B05000J0G | 制造商:FCI 功能描述:OEM ITEM 505-5BNF-SPRING CLAMP SYSTEM |
| HC08 | 制造商:Texas Instruments 功能描述: |
| HC08100 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Breake Away Header .025(0.64mm) Square Posts |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。