參數(shù)資料
型號(hào): HC05V7GRS
英文描述: 68HC05V7 General Release Specification
中文描述: 68HC05V7一般版本規(guī)范
文件頁(yè)數(shù): 39/170頁(yè)
文件大?。?/td> 980K
代理商: HC05V7GRS
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SECTION 4: CPU CORE
MOTOROLA
Page 25
SECTION 4
CPU CORE
The MC68HC05V7 has a 16K memory map. Therefore it uses only the lower 14 bits of the
address bus. In the following discussion the upper 2 bits of the address bus can be ignored.
Also, the STOP instruction may be selected to act as either the normal STOP instruction or
pull a reset by means of a mask option. All other instructions and registers behave as
described in this chapter.
4.1
REGISTERS
The MCU contains five registers that are hard-wired within the CPU and are not part of the
memory map. These five registers are shown in Figure 4-1 and are described in the
following paragraphs.
Figure 4-1: MC68HC05 Programming Model
4.1.1
ACCUMULATOR (A)
The accumulator is a general purpose 8-bit register, as shown in Figure 4-1. The CPU uses
the accumulator to hold operands and results of arithmetic calculations or nonarithmetic
operations. The accumulator is unaffected by a reset of the device.
4.1.2
INDEX REGISTER (X)
The index register shown in Figure 4-1 is an 8-bit register that can perform two functions:
Indexed addressing
Temporary storage
CONDITION CODE REGISTER
I
ACCUMULATOR
6
0
A
INDEX REGISTER
7
1
X
4
5
2
3
STACK POINTER
SP
14
8
15
9
12
13
10
11
PC
CC
1
1
1
1
1
0
0
0
0
0
0
0
0
PROGRAM COUNTER
H
N
Z
C
HALF-CARRY BIT (FROM BIT 3)
INTERRUPT MASK
NEGATIVE BIT
ZERO BIT
CARRY BIT
0
0
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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