參數(shù)資料
型號： uPSD3251
廠商： 意法半導(dǎo)體
英文描述： Flash Programmable System Devices with 8032 Microcontroller Core(帶8032微控制器內(nèi)核的Flash可編程系統(tǒng)設(shè)備)
中文描述： 閃存可編程系統(tǒng)設(shè)備與8032微控制器內(nèi)核（帶8032微控制器內(nèi)核的閃存可編程系統(tǒng)設(shè)備）
文件頁數(shù)： 95/128頁
文件大小： 1566K
代理商： UPSD3251
95/128
μPSD3251F
I/O PORTS (PSD MODULE)
There are three programmable I/O ports: Ports B,
C, and D in the PSD Module. Each of the ports is
eight bits except Port D, which is 1 bit. Each port
pin is individually user configurable, thus allowing
multiple functions per port. The ports are config-
ured using PSDsoft Express Configuration or by
the MCU writing to on-chip registers in the CSIOP
space.
The topics discussed in this section are:
I
General Port architecture
I
Port operating modes
I
Port Configuration Registers (PCR)
I
Port Data Registers
I
Individual Port functionality.
General Port Architecture
The general architecture of the I/O Port block is
shown in Figure 48. Individual Port architectures
are shown in Figure 49 to Figure 52. In general,
once the purpose for a port pin has been defined,
that pin is no longer available for other purposes.
Exceptions are noted.
As shown in Figure 48, the ports contain an output
multiplexer whose select signals are driven by the
configuration bits in the Control Registers (Port B
only) and PSDsoft Express Configuration. Inputs
to the multiplexer include the following:
I
Output data from the Data Out register
I
Latched address outputs
I
CPLD macrocell output
I
External Chip Select (ECS1) from the CPLD.
The Port Data Buffer (PDB) is a tri-state buffer that
allows only one source at a time to be read. The
Port Data Buffer (PDB) is connected to the Internal
Data Bus for feedback and can be read by the
MCU. The Data Out and macrocell outputs, Direc-
tion and Control Registers, and port pin input are
all connected to the Port Data Buffer (PDB).
Figure 48. General I/O Port Architecture
M
DATA OUT
REG.
D
Q
D
G
Q
D
Q
D
Q
WR
WR
WR
ADDRESS
MACROCELL OUTPUTS
ENABLE PRODUCT TERM (.OE)
EXT CS
ALE
READ MUX
P
D
B
CPLD-INPUT
CONTROL REG.
DIR REG.
INPUT
MACROCELL
ENABLE OUT
DATA IN
OUTPUT
SELECT
OUTPUT
MUX
PORT PIN
DATA OUT
ADDRESS
AI06604
相關(guān)PDF資料
PDF描述
uPSD3253AV-24T1T Flash Programmable System Devices with 8032 Microcontroller Core
UPSD3253B Two and Three Channel Codewheels
UPSD3253BV Flash Programmable System Devices with 8032 Microcontroller Core
uPSD3254B-24T1T Flash Programmable System Devices with 8032 Microcontroller Core
uPSD3254B-40T6T Flash Programmable System Devices with 8032 Microcontroller Core
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
uPSD3251MEB 制造商:P&S 功能描述:Flash Programmable System Devices with 8032 Microcontroller Core 制造商:STMicroelectronics 功能描述:Flash Programmable System Devices with 8032 Microcontroller Core
UPSD3253 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash Programmable System Devices with 8032 Microcontroller Core and 256Kbit SRAM
UPSD3253A-24T1 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash Programmable System Device with 8032 Microcontroller Core
UPSD3253A-24T1T 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash Programmable System Device with 8032 Microcontroller Core
UPSD3253A-24T6 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash Programmable System Device with 8032 Microcontroller Core
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報(bào)價(jià)

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*