參數(shù)資料
型號(hào)： uPSD3251
廠商： 意法半導(dǎo)體
英文描述： Flash Programmable System Devices with 8032 Microcontroller Core(帶8032微控制器內(nèi)核的Flash可編程系統(tǒng)設(shè)備)
中文描述： 閃存可編程系統(tǒng)設(shè)備與8032微控制器內(nèi)核（帶8032微控制器內(nèi)核的閃存可編程系統(tǒng)設(shè)備）
文件頁(yè)數(shù)： 85/128頁(yè)
文件大?。?/td> 1566K
代理商： UPSD3251
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μPSD3251F
Memory Select Configuration in Program and
Data Spaces.
The MCU Core has separate ad-
dress spaces for Program memory and Data
memory. Any of the memories within the PSD
Module can reside in either space or both spaces.
This is controlled through manipulation of the VM
Register that resides in the CSIOP space.
The VM Register is set using PSDsoft Express to
have an initial value. It can subsequently be
changed by the MCU so that memory mapping
can be changed on-the-fly.
For example, you may wish to have SRAM and pri-
mary Flash memory in the Data space at Boot-up,
and secondary Flash memory in the Program
space at Boot-up, and later swap the primary and
secondary Flash memories. This is easily done
with the VM Register by using PSDsoft Express
Configuration to configure it for Boot-up and hav-
ing the MCU change it when desired. Table 64 de-
scribes the VM Register.
Table 64. VM Register
Note: 1.
“
Not used
”
bits should be set to '0.'
Bit 7
Bit 6
Bit 5
Bit 4
Primary
FL_Data
Bit 3
Secondary
Data
Bit 2
Primary
FL_Code
Bit 1
Secondary
Code
Bit 0
SRAM_Code
Not
used
(1)
Not
used
(1)
Not
used
(1)
0 = RD
can
’
t access
Flash memory
0 = RD
can
’
t access
Secondary
Flash memory
0 = PSEN
can
’
t access
Flash memory
0 = PSEN
can
’
t access
Secondary
Flash memory
0 = PSEN
can
’
t access
SRAM
Not
used
(1)
Not
used
(1)
Not
used
(1)
1 = RD
access Flash
memory
1 = RD access
Secondary
Flash memory
1 = PSEN
access Flash
memory
1 = PSEN
access
Secondary
Flash memory
1 = PSEN
access SRAM
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
uPSD3251MEB 制造商:P&S 功能描述:Flash Programmable System Devices with 8032 Microcontroller Core 制造商:STMicroelectronics 功能描述:Flash Programmable System Devices with 8032 Microcontroller Core
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