參數(shù)資料
型號(hào)： UJA1061
廠商： NXP Semiconductors N.V.
英文描述： Low speed CAN/LIN system basis chip
中文描述： 低高速CAN / LIN系統(tǒng)基礎(chǔ)芯片
文件頁(yè)數(shù)： 8/81頁(yè)
文件大?。?/td> 323K
代理商： UJA1061
2004 Mar 22
8
Philips Semiconductors
Objective specification
Low speed CAN/LIN system basis chip
UJA1061
6
FUNCTIONAL DESCRIPTION
6.1
Introduction
The UJA1061 combines all peripheral functions around a
microcontroller within typical automotive body multiplexing
applications into one dedicated chip. The functions are:
Power supply for host microcontroller
Power supply for CAN physical layer
Switched BAT42 output
System reset
Watchdog with Window and Time-out modes
On-chip oscillator
Fault-tolerant CAN and LIN physical layers for serial
communication suitable for 12 and 42 V applications
SPI control interface
Local wake-up input
Inhibit output, or ‘limp home’ output
System Inhibit output port
Compatibility with 42 V power supply systems
Fail-safe behaviour.
6.2
Fail-safe system controller
The fail-safe system controller is the ‘heart’ of the
UJA1061 and is controlled mainly by the watchdog, which
is clocked directly via a dedicated, on-chip oscillator.
It handles the register configuration and controls all
internal functions of the UJA1061. The device status
information is collected and reflected to the
microcontroller. Also the reset and interrupt signals are
provided by the system controller.
The system controller is a state machine. The different
levels of operation provided are represented in Fig.3.
6.2.1
F
AIL
-
SAFE MODE
During severe fault situations the UJA1061 always enters
its Fail-safe mode (see also Fig.3). This mode has the
lowest possible system power consumption. These fault
situations are:
On-chip oscillator failure (frequency too low). Fail-safe
mode is entered from any other mode immediately after
this failure is detected
Pin RSTN is clamped HIGH for more than 128 ms while
the UJA1061 tries to drive pin RSTN LOW. The
Fail-safe mode will be entered immediately out of any
other mode in which the UJA1061 tries to drive
pin RSTN LOW (Start-up, Standby or Sleep mode) after
detecting this failure
Pin RSTN is clamped LOW for more than 256 ms after
the UJA1061 has released the pin RSTN internally in
Start-up or in Restart mode
A falling edge on pin RSTN during the initialization
phase in Restart mode
No successful initialization of Normal mode within
256 ms after pin RSTN has become HIGH in Restart
mode whereby that the software-controlled Software
Development mode is not active
Wrong mode register code within Restart mode
Wrong SPI count within Restart mode
Low V1 regulator output for more than 256 ms due to a
too-high load or a short-circuit of V1 to ground in
Start-up mode
Low V1 regulator output directly after an
already-released pin RSTN in Restart mode.
The following events cause the system to exit the Fail-safe
mode if the on-chip oscillator is running correctly:
Activity on the CAN-bus
Activity on the LIN-bus
Activity on pin WAKE.
The UJA1061 restarts out of Fail-safe mode and enters
Start-up mode to give the application a new opportunity to
start. Regulator V1 starts again and the reset pulse will be
set to the long period (see Section 6.5.1).
6.2.2
S
TART
-
UP MODE
Start-up mode is entered after a number of events that
result in a system reset (see Fig.3) and is the first
opportunity for the system to start-up. These events are:
The first battery and ground connection of the module
whereby the power supply V1 for the host
microcontroller becomes active for the first time. The
UJA1061 provides a Power-on reset for the system. As
this is the first connection of the battery, the UJA1061
has no indication of the reset length required by the host
microcontroller, therefore the long reset sequence is
chosen as default
相關(guān)PDF資料
PDF描述
UJA1065 High-speed CAN/LIN fail-safe system basis chip
UL631H256 SimtekLow Voltage SoftStore 32K x 8 nvSRAM
UL631H256S2C35 SimtekLow Voltage SoftStore 32K x 8 nvSRAM
UL631H256S2C35G1 SimtekLow Voltage SoftStore 32K x 8 nvSRAM
UL631H256S2C45 SimtekLow Voltage SoftStore 32K x 8 nvSRAM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
UJA1061_10 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Fault-tolerant CAN/LIN fail-safe system basis chip
UJA1061TW 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Fault-tolerant CAN/LIN fail-safe system basis chip
UJA1061TW/3V0,512 制造商:NXP Semiconductors 功能描述:
UJA1061TW/3V0512 制造商:NXP Semiconductors 功能描述:CONTROLLER SYS CAN/LIN 3V 32HTSSOP
UJA1061TW/3V3/C/T, 功能描述:CAN 接口集成電路 FT CAN/LIN fail-safe system basis chip RoHS:否 制造商:Texas Instruments 類型:Transceivers 工作電源電壓:5 V 電源電流: 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:SOIC-8 封裝:Tube
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*