參數(shù)資料
型號: UJA1061
廠商: NXP Semiconductors N.V.
英文描述: Low speed CAN/LIN system basis chip
中文描述: 低高速CAN / LIN系統(tǒng)基礎(chǔ)芯片
文件頁數(shù): 77/81頁
文件大?。?/td> 323K
代理商: UJA1061
2004 Mar 22
77
Philips Semiconductors
Objective specification
Low speed CAN/LIN system basis chip
UJA1061
10 PACKAGE OUTLINE
UNIT
A1
A2
A3
bp
c
D
(1)
E
(2)
e
HE
L
Lp
Z
y
w
v
θ
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
JEDEC
JEITA
mm
0.15
0.05
8
0
o
o
0.1
DIMENSIONS (mm are the original dimensions).
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
SOT549-1
99-03-04
03-04-07
w
M
θ
A
A1
A2
Eh
Dh
D
L
p
detail X
E
Z
exposed die pad side
e
c
L
X
(A3)
0.25
1
16
32
17
y
b
HE
0.95
0.85
0.30
0.19
Dh
5.1
4.9
Eh
3.6
3.4
0.20
0.09
11.1
10.9
6.2
6.0
8.3
7.9
0.65
1
0.2
0.78
0.48
0.1
0.75
0.50
p
v
M
A
A
HTSSOP32: plastic thermal enhanced thin shrink small outline package; 32 leads;
body width 6.1 mm; lead pitch 0.65 mm; exposed die pad
SOT549-1
A
max.
1.1
0
2.5
5 mm
scale
pin 1 index
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