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參數(shù)資料
| 型號： | UJA1061 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Low speed CAN/LIN system basis chip |
| 中文描述： | 低高速CAN / LIN系統(tǒng)基礎(chǔ)芯片 |
| 文件頁數(shù)： | 60/81頁 |
| 文件大小： | 323K |
| 代理商： | UJA1061 |
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2004 Mar 22
60
Philips Semiconductors
Objective specification
Low speed CAN/LIN system basis chip
UJA1061
8
T
vj
=
40 to +150
°
C, V
BAT42
= 5.5 to 52 V, V
BAT14
= 5.5 to 27 V; unless otherwise specified. All voltages are defined
with respect to ground. Positive currents flow into the IC. All parameters are guaranteed over the virtual junction
temperature range by design. Products are 100% tested at 125
°
C ambient temperature on wafer level (pre-testing).
Cased products are 100% tested at 25
°
C ambient temperature (final testing). Both pre-testing and final testing use
correlated test conditions to cover the specified temperature and power supply voltage range.
DC CHARACTERISTICS
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Supply (pin BAT42)
I
BAT42
supply current
BAT42
Sleep mode; V3 OFF or in Cyclic
mode; CAN and LIN in Off-line;
I
INH
= I
SYSINH
= I
RTH
= I
RTL
=
I
RTLIN
= 0; V
WAKE
= V
BAT42
Sleep mode; V3 continuously ON;
CAN and LIN in Off-line; I
INH
=
I
SYSINH
= I
RTH
= I
RTL
= I
RTLIN
= 0;
V
WAKE
= V
BAT42
Sleep mode; V2 ON; V3
continuously ON; CAN in Selective
Sleep mode or On-line; LIN in
Off-line; I
INH
= I
SYSINH
= I
RTH
= I
RTL
=
I
RTLIN
= 0; V
WAKE
= V
BAT14
= V
BAT42
Standby mode; V1, V2 ON;
V3 continuously ON; CAN in
Selective Sleep mode or On-line;
LIN in Off-line; I
INH
= I
SYSINH
= I
RTH
=
I
RTL
= I
RTLIN
= 0; V
WAKE
= V
BAT42
Normal mode; V1, V2, V3 ON;
CAN and LIN in Active mode;
watchdog ON; L42C = logic 0;
I
V3
= I
INH
= I
SYSINH
= 0;
V
WAKE
= V
BAT42
; V
BAT14
≥
V
BAT42
Normal mode; V1, V2, V3 ON;
CAN and LIN in Active mode;
watchdog ON; L42C = logic 0;
I
V3
= I
INH
= I
SYSINH
= 0;
V
WAKE
= V
BAT42
; V
BAT14
< V
BAT42
Normal mode; V1, V2, V3 ON;
CAN and LIN in Active mode;
watchdog ON; L42C = logic 1;
I
V3
= I
INH
= I
SYSINH
= 0;
V
WAKE
= V
BAT42
; V
BAT14
> V
BAT42
Normal mode; V1, V2, V3 ON;
CAN and LIN in Active mode;
watchdog ON; L42C = logic 1;
I
V3
= I
INH
= I
SYSINH
= 0;
V
WAKE
= V
BAT42
; V
BAT14
< V
BAT42
Power-on reset flag (PWONS) set
Power-on reset flag (PWONS) not
set
50
100
μ
A
60
120
μ
A
70
140
mA
70
140
μ
A
70
140
μ
A
250
500
μ
A
500
1000
μ
A
700
1400
μ
A
V
(BAT42)POR
supply voltage
BAT42 Power-on
reset
4
1
V
V
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| UJA1061_10 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Fault-tolerant CAN/LIN fail-safe system basis chip |
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| UJA1061TW/3V0,512 | 制造商:NXP Semiconductors 功能描述: |
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| UJA1061TW/3V3/C/T, | 功能描述:CAN 接口集成電路 FT CAN/LIN fail-safe system basis chip RoHS:否 制造商:Texas Instruments 類型:Transceivers 工作電源電壓:5 V 電源電流: 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:SOIC-8 封裝:Tube |
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