參數(shù)資料
型號: UJA1061
廠商: NXP Semiconductors N.V.
英文描述: Low speed CAN/LIN system basis chip
中文描述: 低高速CAN / LIN系統(tǒng)基礎(chǔ)芯片
文件頁數(shù): 64/81頁
文件大?。?/td> 323K
代理商: UJA1061
2004 Mar 22
64
Philips Semiconductors
Objective specification
Low speed CAN/LIN system basis chip
UJA1061
42 V inhibit output (pin SYSINH)
V
BAT42-SYSINH
V
BAT42
to V
SYSINH
voltage drop
leakage current
I
SYSINH
=
0.2 mA
1.0
V
I
L
Inhibit output (pin INH)
V
BAT14-INH
V
SYSINH
= 0 V
5
μ
A
V
BAT14
to V
INH
voltage drop
leakage current
I
INH
=
10
μ
A
I
INH
=
200
μ
A
V
INH
= 0 V
0.7
1.2
1.0
2.0
5
V
V
μ
A
I
L
Wake input (pin WAKE)
V
det(WAKE)
WAKE detection
threshold
detectionthreshold
hysteresis
pull-up input
current
detection level
release level
2.0
2.0
100
3.3
3.5
200
4.5
4.5
500
V
V
mV
V
hys(det)WAKE
I
WAKE
V
WAKE
= 0 V
10
4
μ
A
Serial peripheral interface inputs (pins SDI, SCK, SCS)
V
th(IL)
LOW-level input
threshold voltage
V
th(IH)
HIGH-level input
threshold voltage
V
hys(th)
hysteresis of input
threshold voltage
R
pd(SCK)
pull-down resistor
at pin SCK
R
pd(SCS)
pull-down resistor
at pin SCS
I
SDI
input leakage
current at pin SDI
Serial peripheral interface data output (pin SDO)
I
OL
LOW-level output
current
I
OH
HIGH-level output
current
I
LOZ
OFF-state output
leakage current
Reset push-pull input/output (pin RSTN)
V
th(IL)
LOW-level input
threshold voltage
V
th(IH)
HIGH-level input
threshold voltage
V
hys(th)
hysteresis of input
threshold voltage
I
OL
LOW-level output
current
0.3
0.3
×
V
V1
V
0.7
×
V
V1
V
V1
+ 0.3
V
200
400
mV
V
SCK
= 2 V; V
V1
2 V
50
130
400
k
V
SCS
= 1 V; V
V1
2 V
50
130
400
k
V
SDI
= 0 to V
V1
5
+5
μ
A
V
O
= 0.4 V
1.6
tbf
mA
V
O
= V
V1
0.4 V
tbf
1.6
mA
V
O
= 0 to V
V1
5
+5
μ
A
0.3
+0.3
×
V
V1
V
0.7
×
V
V1
V
V1
+ 0.3
V
200
400
mV
V
O
= 0.4 V
50
1000
μ
A
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
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