參數(shù)資料
型號(hào)： S70WS512N00BFWAB2
廠商： Spansion Inc.
英文描述： Same-Die Stacked Multi-Chip Product (MCP) 512 Megabit (32M x 16 bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst-mode Flash Memory
中文描述： 同硅晶片堆疊多芯片產(chǎn)品（MCP）的512兆位（32兆× 16位）的CMOS 1.8伏，只有同時(shí)讀/寫，突發(fā)模式閃存
文件頁數(shù)： 56/93頁
文件大?。?/td> 846K
代理商： S70WS512N00BFWAB2
March 14, 2005 S70WS512N00_00_A0
S70WS512N00 Based MCPs
57
A d v a n c e I n f o r m a t i o n
Figure 9.3 Lock Register Program Algorithm
Write Unlock Cycles:
Address 555h, Data AAh
Address 2AAh, Data 55h
Write
Enter Lock Register Command:
Address 555h, Data 40h
Program Lock Register Data
Address XXXh, Data A0h
Address 77h*, Data PD
Unlock Cycle 1
Unlock Cycle 2
XXXh = Address don’t care
* Not on future devices
Program Data (PD): See text for Lock Register
definitions
Caution:
Lock register can only be progammed
once.
Wait 4
μ
s
PASS. Write Lock Register
Exit Command:
Address XXXh, Data 90h
Address XXXh, Data 00h
Device returns to reading array.
Perform Polling Algorithm
(see Write Operation Status
flowchart)
Yes
Yes
No
No
Done
DQ5 = 1
Error condition (Exceeded Timing Limits)
FAIL. Write rest command
to return to reading array.
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