
Multi-Service Access Device For Channelized Interfaces
Telecom Standard Product Data Sheet
Production
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-1990823, Issue 4
563
Table 47 PLCP Overhead Processing
Overhead Field
Transmit Operation
Receive Operation
A1, A2:
Frame Alignment
Pattern
Inserts the PLCP frame alignment
pattern (F628H)
Searches the receive stream for the
PLCP frame alignment pattern. When
the pattern has been detected for two
consecutive rows, along with two valid,
and sequential path overhead identifier
octets, the S/UNI-MACH48 declares
in-frame. Note that the ATM cell
boundaries are implicitly known when
the PLCP frame is located, thus cell
delineation is accomplished by locating
the PLCP frame. When errors are
detected in both octets in a single row,
or when errors are detected in two
consecutive path overhead identifier
octets, the S/UNI-MACH48 declares
an out-of-frame defect. The loss-of-
frame defect is an integrated version of
the out-of-frame defect state.
PO-P11:
Path Overhead
Identifier
Inserts the path overhead identifier
codes in accordance with the PLCP
frame alignment. See Table 48.
Identifies the PLCP path overhead
bytes by monitoring the sequence of
the POI bytes.
Z1-Z6:
Growth:
These octets are unused and are
programmed with all zeros.
These octets are ignored.
F1:
User Channel
This octet is unused and the value
inserted in this octet is controlled by an
internal register.
This octet is ignored.
B1:
Bit Interleaved Parity
This octet contains an 8-bit interleaved
parity (BIP) calculated across the entire
PLCP frame (excluding the A1, A, Pn
octets and the trailer). The B1 value is
calculated based on even parity and the
value inserted in the current frame is
the BIP result calculated for the
previous frame.
The bit interleaved parity is calculated
for the current frame and stored. The
B1 octet contained in the subsequent
frame is extracted and compared
against the calculated value.
Differences between the two values
provide an indication of the end-to-end
bit error rate. These differences are
accumulated in a counter in the PLCP
PMON block.
G1:
Path Status
The first four bit positions provide a
PLCP far end block error function and
indicates the number of B1 errors
detected at the near end. The FEBE
field has nine legal values (0000b-
1000b) indicating between zero and
eight B1 errors.
The fifth bit position is used to transmit
PLCP yellow alarm. The last three bit
positions provide the link status signal
used in IEEE-802.6 DQDB
implementations. Yellow alarm and link
status signal insertion is controlled by
the internal registers.
The G1 byte provides the PLCP FEBE
function and is accumulated in an a
counter in the PLCP PMON block.
PLCP yellow alarm is detected or
removed when the yellow bit is set to
logic one or zero for ten consecutive
frames. The yellow alarm state and
the link status signal state are
contained in the SPLR Status register.