參數(shù)資料
型號： MC68HC908RK2DW
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, FLASH, 4 MHz, MICROCONTROLLER, PDSO20
封裝： PLASTIC, SOIC-20
文件頁數(shù)： 49/158頁
文件大?。?/td> 1020K
代理商： MC68HC908RK2DW
Development Support
MC68HC908RK2 Data Sheet, Rev. 5.1
142
Freescale Semiconductor
Figure 12-9. Break Transaction
12.3.1.5 Commands
The monitor ROM firmware uses these commands:
READ (read memory)
WRITE (write memory)
IREAD (indexed read)
IWRITE (indexed write)
READSP (read stack pointer)
RUN (run user program)
The monitor ROM firmware echoes each received byte back to the PTA0 pin for error checking. An 11-bit
delay at the end of each command allows the host to send a break character to cancel the command. A
delay of two bit times occurs before each echo and before READ, IREAD, or READSP data is returned.
The data returned by a read command appears after the echo of the last byte of the command.
NOTE
Wait one bit time after each echo before sending the next byte.
Figure 12-10. Read Transaction
Figure 12-11. Write Transaction
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
MISSING STOP BIT
2-STOP-BIT DELAY BEFORE ZERO ECHO
READ
ECHO
FROM
HOST
ADDRESS
HIGH
ADDRESS
HIGH
ADDRESS
LOW
ADDRESS
LOW
DATA
RETURN
13, 2
11
4
Notes:
2 = Data return delay, 2 bit times
3 = Cancel command delay, 11 bit times
4 = Wait 1 bit time before sending next byte.
44
1 = Echo delay, 2 bit times
WRITE
ECHO
FROM
HOST
ADDRESS
HIGH
ADDRESS
HIGH
ADDRESS
LOW
ADDRESS
LOW
DATA
Notes:
2 = Cancel command delay, 11 bit times
3 = Wait 1 bit time before sending next byte.
11
3
11
3
32, 3
1 = Echo delay, 2 bit times
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