參數(shù)資料
型號： MC68HC908RK2DW
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, FLASH, 4 MHz, MICROCONTROLLER, PDSO20
封裝： PLASTIC, SOIC-20
文件頁數(shù)： 146/158頁
文件大?。?/td> 1020K
代理商： MC68HC908RK2DW
Keyboard/External Interrupt Module (KBI)
MC68HC908RK2 Data Sheet, Rev. 5.1
88
Freescale Semiconductor
Figure 7-5. Keyboard Interrupt Block Diagram
An IRQ/keyboard interrupt is latched when one or more keyboard pins goes low after all were high. The
MODEK bit in the keyboard status and control register controls the triggering mode of the keyboard
interrupt.
If the keyboard interrupt is edge-sensitive only, a falling edge on a keyboard pin does not latch an
interrupt request if another keyboard pin is already low. To prevent losing an interrupt request on
one pin because another pin is still low, software can disable the latter pin while it is low.
If the keyboard interrupt is falling edge- and low level-sensitive, an interrupt request is present as
long as any keyboard pin is low.
If the MODEK bit is set, the keyboard interrupt pins are both falling edge- and low level-sensitive, and both
of these actions must occur to clear a keyboard interrupt request:
Vector fetch or software clear — A vector fetch generates an interrupt acknowledge signal to clear
the interrupt request. Software may generate the interrupt acknowledge signal by writing a 1 to the
ACKK bit in the keyboard status and control register (INTKBSCR). The ACKK bit is useful in
applications that poll the keyboard interrupt pins and require software to clear the keyboard
interrupt request. Writing to the ACKK bit prior to leaving an interrupt service routine also can
prevent spurious interrupts due to noise. Setting ACKK does not affect subsequent transitions on
the keyboard interrupt pins. A falling edge that occurs after writing to the ACKK bit latches another
interrupt request. If the keyboard interrupt mask bit, IMASKK, is clear, the CPU loads the program
counter with the vector address at locations $FFFA and $FFFB.
Return of all enabled keyboard interrupt pins to logic 1. As long as any enabled keyboard interrupt
pin is at logic 0, the keyboard interrupt remains set.
The vector fetch or software clear and the return of all enabled keyboard interrupt pins to logic 1 may occur
in any order.
If the MODEK bit is clear, the keyboard interrupt pin is falling edge-sensitive only. With MODEK clear, a
vector fetch or software clear immediately clears the keyboard interrupt request.
KB1IE
KB6IE
.
KEYBOARD
INTERRUPT
DQ
CK
CLR
VDD
MODEK
IMASKK
KEYBOARD
INTERRUPT LATCH
REQUEST
VECTOR FETCH
DECODER
ACKK
INTERNAL BUS
RESET
KBD6
KBD1
SYNCHRONIZER
KEYF
IRQ
INTERRUPT
REQUEST
IRQ/KEYBOARD
INTERRUPT
REQUEST
TO
PULLUP
ENABLE
TO
PULLUP
ENABLE
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