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型號(hào)：	MB90V560CR
廠商：	FUJITSU LTD
元件分類(lèi)：	微控制器/微處理器
英文描述：	16-BIT, 8 MHz, MICROCONTROLLER, CPGA256
封裝：	PGA-256
文件頁(yè)數(shù)：	609/616頁(yè)
文件大?。?/td>	15240K
代理商：	MB90V560CR

CHAPTER 3 RESETS

s Mode Data Fetch

When a reset is cleared, the CPU transfers mode data to the mode data register. After the

mode data is transferred, the reset vector is transferred to the program counter (PC) and the

program counter bank register (PCB).

The mode data register can determine the bus mode and the bus width. The reset vector can

determine the program start address.

For more information, see CHAPTER 7 "SETTING A MODE".

Figure 3.4-2 Transfer of Reset Vector and Mode Data

Reference:

Set the mode pins to specify whether the mode data and the reset vector should be read

from internal ROM (or flash memory) or from external memory. If the mode pins are set to

external memory, the mode data and the reset vector are read from the external memory. If

the mode pins are set to internal ROM (or flash memory), the mode data and the reset vector

are read from the internal ROM (or flash memory). If the single-chip mode is used, set the

mode pins to internal ROM (or flash memory).

For more information, see Section 7.2 "Mode Pins (MD2 to MD0)".

r Mode data register (address: FFFFDFH)

The mode data register setting can be changed while a reset sequence is executed. The mode

data register setting is valid after a reset vector is fetched. No new contents can be written to

the mode data register even if an instruction is used to specify mode data at "FFFFDFH".

For more information, see Section 7.3 "Mode Data Register".

r Reset vector (address: "FFFFDCH" to "FFFFDEH")

The reset vector determines the program start address used after a reset is cleared. A program

is executed from the address specified in the reset vector.

Memory space

F2MC-16LX CPU core

Bits 23 to 16 of the reset vector

Bits 15 to 8 of the reset vector

Bits 7 to 0 of the reset vector

Mode register

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